static const OPTION
optionsTable[] = {
{ 'm', NULL, NULL, "Set the port to use e.g. -mz80." },
+ { 'p', NULL, NULL, "Select port specific processor e.g. -mpic14 -p16f84" },
{ 'd', NULL, NULL, NULL },
{ 'D', NULL, NULL, "Define macro as in -Dmacro" },
{ 'I', NULL, NULL, "Add to the include (*.h) path, as in -Ipath" },
{ 'g', NULL, "use --generic instead" },
{ 'X', NULL, "use --xstack-loc instead" },
{ 'x', NULL, "use --xstack instead" },
- { 'p', NULL, "use --stack-loc instead" },
- { 'P', NULL, "use --stack-loc instead" },
{ 'i', NULL, "use --idata-loc instead" },
{ 'r', NULL, "use --xdata-loc instead" },
{ 's', NULL, "use --code-loc instead" },
#define NUM_PORTS (sizeof(_ports)/sizeof(_ports[0]))
-/**
- remove me - TSD a hack to force sdcc to generate gpasm format .asm files.
- */
+#if !OPT_DISABLE_PIC
extern void picglue ();
+#endif
/** Sets the port to the one given by the command line option.
@param The name minus the option (eg 'mcs51')
{
if (_ports[i]->magic != PORT_MAGIC)
{
+ /* Uncomment this line to debug which port is causing the problem
+ * (the target name is close to the beginning of the port struct
+ * and probably can be accessed just fine). */
+ fprintf(stderr,"%s :",_ports[i]->target);
wassertl (0, "Port definition structure is incomplete");
}
}
}
+/* search through the command line options for the port */
static void
_findPort (int argc, char **argv)
{
werror (W_UNSUPPORTED_MODEL, sz, port->target);
}
+static void
+_setProcessor (char *_processor)
+{
+ port->processor = _processor;
+ fprintf(stderr,"Processor: %s\n",_processor);
+}
+
/** Gets the string argument to this option. If the option is '--opt'
then for input of '--optxyz' or '--opt xyz' returns xyz.
*/
_setPort (argv[i] + 2);
break;
+ case 'p':
+ /* Used to select the processor in port */
+ _setProcessor (getStringArg("-p", argv, &i, argc));
+ break;
+
case 'c':
verifyShortOption(argv[i]);
}
#endif
-#if !OPT_DISABLE_XA51
+#if !OPT_DISABLE_XA51
+#ifdef STD_XA51_LIB
if (options.model == MODEL_PAGE0)
{
fprintf (lnkfile, "-l %s\n", STD_XA51_LIB);
}
+#endif
#endif
fprintf (lnkfile, "-l %s\n", STD_LIB);
fprintf (lnkfile, "-l %s\n", STD_INT_LIB);
TARGET_ID_AVR,
"avr",
"ATMEL AVR", /* Target name */
+ NULL, /* processor */
{
TRUE, /* Emit glue around main */
MODEL_LARGE | MODEL_SMALL,
TARGET_ID_DS390,
"ds390",
"DS80C390", /* Target name */
+ NULL,
{
TRUE, /* Emit glue around main */
MODEL_SMALL | MODEL_LARGE | MODEL_FLAT24,
TARGET_ID_DS390,
"TININative",
"DS80C390", /* Target name */
+ NULL, /* processor */
{
FALSE, /* Emit glue around main */
MODEL_FLAT24,
TARGET_ID_I186,
"i186",
"Intel 80186", /* Target name */
+ NULL,
{
FALSE, /* Emit glue around main */
MODEL_SMALL,
TARGET_ID_TLCS900H,
"tlcs900h",
"Toshiba TLCS-900H", /* Target name */
+ NULL,
{
TRUE, /* Emit glue around main */
MODEL_SMALL,
TARGET_ID_MCS51,
"mcs51",
"MCU 8051", /* Target name */
+ NULL, /* Processor name */
{
TRUE, /* Emit glue around main */
MODEL_SMALL | MODEL_LARGE,
{0x02, 0x04, 0x180, 0},
{0x05, 0x05, 0x000, 0},
{0x06, 0x06, 0x100, 0},
+ {0x81, 0x81, 0x100, 1},
{0x85, 0x85, 0x000, 1},
{0x86, 0x86, 0x100, 1},
{0x0a, 0x0b, 0x180, 0},
{0x01, 0x01, 0x00, 0},
{0x02, 0x04, 0x80, 0},
{0x05, 0x06, 0x00, 0},
- {0x85, 0x86, 0x80, 1},
+ {0x81, 0x81, 0x00, 1},
+ {0x85, 0x86, 0x00, 1},
{0x08, 0x09, 0x00, 0},
{0x88, 0x89, 0x00, 1},
{0x0a, 0x0b, 0x80, 0},
{0x02, 0x04, 0x180, 0},
{0x05, 0x05, 0x000, 0},
{0x85, 0x85, 0x000, 1},
+ {0x81, 0x81, 0x100, 1},
{0x06, 0x06, 0x100, 0},
{0x86, 0x86, 0x100, 1},
{0x07, 0x09, 0x000, 0},
static int num_of_supported_PICS = sizeof(Pics)/sizeof(PIC_device);
static int default_pic = 0;
-#define DEFAULT_PIC "f84"
+#define DEFAULT_PIC "f877"
static PIC_device *pic=NULL;
do {
- fprintf(stdout,"mapping %s to address 0x%02x\n",reg->name, (reg->address+alias+i));
+ //fprintf(stdout,"mapping %s to address 0x%02x\n",reg->name, (reg->address+alias+i));
finalMapping[reg->address + alias + i].reg = reg;
finalMapping[reg->address + alias + i].instance = i;
}
-void assignRelocatableRegisters(set *regset)
+void assignRelocatableRegisters(set *regset, int used)
{
regs *reg;
//fprintf(stdout,"assigning %s\n",reg->name);
- if(!reg->isFixed)
+ if((!reg->isFixed) && ( (used==0) || reg->wasUsed))
address = assignRegister(reg,address);
}
DEBUGpic14_AopType(__LINE__,IC_LEFT(ic),NULL,IC_RESULT(ic));
/* if in bit space then a special case */
if (AOP_TYPE(IC_LEFT(ic)) == AOP_CRY) {
- pic14_emitcode("movlw","1<<garbage");
- //pic14_emitcode("mov","c,%s",IC_LEFT(ic)->aop->aopu.aop_dir);
- //pic14_emitcode("cpl","c");
- //pic14_outBitC(IC_RESULT(ic));
+ if (AOP_TYPE(IC_RESULT(ic)) == AOP_CRY) {
+ emitpcode(POC_MOVLW,popGet(AOP(IC_LEFT(ic)),0));
+ emitpcode(POC_XORWF,popGet(AOP(IC_RESULT(ic)),0));
+ } else {
+ emitpcode(POC_CLRF,popGet(AOP(IC_RESULT(ic)),0));
+ emitpcode(POC_BTFSS,popGet(AOP(IC_LEFT(ic)),0));
+ emitpcode(POC_INCF,popGet(AOP(IC_RESULT(ic)),0));
+ }
goto release;
}
pic14_emitcode("ljmp","%05d_DS_",IC_FALSE(ifx)->key+100);
}
pic14_emitcode("","%05d_DS_:",tlbl->key+100+labelOffset);
+
+ {
+ /* left and right are both bit variables, result is carry */
+ resolvedIfx rIfx;
+
+ resolveIfx(&rIfx,ifx);
+
+ emitpcode(POC_MOVLW,popGet(AOP(left),0));
+ emitpcode(POC_ANDFW,popGet(AOP(left),0));
+ emitpcode(POC_BTFSC,popGet(AOP(right),0));
+ emitpcode(POC_ANDLW,popGet(AOP(left),0));
+ genSkipz2(&rIfx);
+ }
} else {
/* They're not both bit variables. Is the right a literal? */
AnalyzepCode('*'); //code->dbName);
//#ifdef PCODE_DEBUG
- printCallTree(stderr);
+ // printCallTree(stderr);
//#endif
pcode_test();
TARGET_ID_PIC,
"pic14",
"MCU pic", /* Target name */
+ NULL, /* Processor */
{
TRUE, /* Emit glue around main */
MODEL_SMALL | MODEL_LARGE | MODEL_FLAT24,
pCodeOpReg pc_pclath = {{PO_PCLATH, "PCLATH"}, -1, NULL,0,NULL};
pCodeOpReg pc_kzero = {{PO_GPR_REGISTER, "KZ"}, -1, NULL,0,NULL};
-pCodeOpReg pc_wsave = {{PO_GPR_REGISTER, "W_SAVE"}, -1, NULL,0,NULL};
-pCodeOpReg pc_ssave = {{PO_GPR_REGISTER, "STATUS_SAVE"}, -1, NULL,0,NULL};
+pCodeOpReg pc_wsave = {{PO_GPR_REGISTER, "WSAVE"}, -1, NULL,0,NULL};
+pCodeOpReg pc_ssave = {{PO_GPR_REGISTER, "SSAVE"}, -1, NULL,0,NULL};
static int mnemonics_initialized = 0;
static pFile *the_pFile = NULL;
-static int peepOptimizing = 0;
+static int peepOptimizing = 1;
static int GpCodeSequenceNumber = 1;
static int GpcFlowSeq = 1;
* The double parenthesis (()) are necessary
*
***********************************************************************/
-//#define PCODE_DEBUG
+#define PCODE_DEBUG
#ifdef PCODE_DEBUG
#define DFPRINTF(args) (fprintf args)
PCOL(pcopnew)->lit = PCOL(pcop)->lit;
break;
+ case PO_GPR_BIT:
+
+ pcopnew = newpCodeOpBit(pcop->name, PCORB(pcop)->bit,PCORB(pcop)->inBitSpace);
+ PCOR(pcopnew)->r = PCOR(pcop)->r;
+ PCOR(pcopnew)->rIdx = PCOR(pcop)->rIdx;
+ DFPRINTF((stderr," pCodeOpCopy Bit -register index\n"));
+ return pcopnew;
+ break;
+
case PO_GPR_REGISTER:
case PO_GPR_TEMP:
- case PO_GPR_BIT:
case PO_FSR:
case PO_INDF:
//DFPRINTF((stderr,"pCodeOpCopy GPR register\n"));
DFPRINTF((stderr," register index %d\n", PCOR(pcop)->r->rIdx));
break;
+ case PO_STATUS:
+ DFPRINTF((stderr,"pCodeOpCopy PO_STATUS\n"));
case PO_DIR:
//DFPRINTF((stderr,"pCodeOpCopy PO_DIR\n"));
case PO_SFR_REGISTER:
case PO_NONE:
case PO_W:
case PO_INTCON:
- case PO_STATUS:
case PO_PCL:
case PO_PCLATH:
// clrw
//lab1
//
-// However, the Rule has wild cards four wild cards.
-// The first allows the btfss instruction operate
-// on anything, not just the Z bit in status register.
+// However, the Rule has four wild cards.
+// The first allows the btfss instruction operator
+// be anything, not just the Z bit in status register.
// The second wild card applies to a label.
// The third wild card is for an instruction - any
// single instruction can be substituted.
debugLog ("Found a Stack Register!\n");
} else if( (dReg = regWithIdx ( dynProcessorRegs, idx,0)) != NULL ) {
debugLog ("Found a Processor Register!\n");
+ } else if( (dReg = regWithIdx ( dynInternalRegs, idx,0)) != NULL ) {
+ debugLog ("Found an Internal Register!\n");
} else {
debugLog ("Dynamic Register not found\n");
}
extern void assignFixedRegisters(set *regset);
-extern void assignRelocatableRegisters(set *regset);
+extern void assignRelocatableRegisters(set *regset,int used);
extern void dump_map(void);
extern void dump_cblock(FILE *of);
assignFixedRegisters(dynStackRegs);
assignFixedRegisters(dynDirectRegs);
- assignRelocatableRegisters(dynAllocRegs);
- assignRelocatableRegisters(dynStackRegs);
- assignRelocatableRegisters(dynDirectRegs);
+ assignRelocatableRegisters(dynInternalRegs,1);
+ assignRelocatableRegisters(dynAllocRegs,0);
+ assignRelocatableRegisters(dynStackRegs,0);
+ assignRelocatableRegisters(dynDirectRegs,0);
//dump_map();
/** Target name string, used for --help */
const char *target_name;
+/** Specific processor for the given target family. specified by -p */
+ char *processor;
+
struct
{
/** TRUE if all types of glue functions should be inserted into
TARGET_ID_XA51,
"xa51",
"MCU 80C51XA", /* Target name */
+ NULL, /* Processor name */
{
FALSE, /* Emit glue around main */
MODEL_PAGE0,
TARGET_ID_Z80,
"z80",
"Zilog Z80", /* Target name */
+ NULL, /* Processor name */
{
FALSE,
MODEL_MEDIUM | MODEL_SMALL,
TARGET_ID_GBZ80,
"gbz80",
"Gameboy Z80-like", /* Target name */
+ NULL,
{
FALSE,
MODEL_MEDIUM | MODEL_SMALL,