--- /dev/null
+/***************************************************************************
+ * Copyright (C) 2010 by Spencer Oliver *
+ * spen@spen-soft.co.uk *
+ * *
+ * Copyright (C) 2011 Øyvind Harboe *
+ * oyvind.harboe@zylin.com *
+ * *
+ * Copyright (C) 2011 Clement Burin des Roziers *
+ * clement.burin-des-roziers@hikob.com *
+ * *
+ * This program is free software; you can redistribute it and/or modify *
+ * it under the terms of the GNU General Public License as published by *
+ * the Free Software Foundation; either version 2 of the License, or *
+ * (at your option) any later version. *
+ * *
+ * This program is distributed in the hope that it will be useful, *
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of *
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
+ * GNU General Public License for more details. *
+ * *
+ * You should have received a copy of the GNU General Public License *
+ * along with this program; if not, write to the *
+ * Free Software Foundation, Inc., *
+ * 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. *
+ ***************************************************************************/
+
+
+// Build : arm-eabi-gcc -c stm32lx.S
+ .text
+ .syntax unified
+ .cpu cortex-m3
+ .thumb
+ .thumb_func
+ .global write
+
+/*
+ r0 - destination address
+ r1 - source address
+ r2 - count
+*/
+
+ // Set 0 to r3
+ movs r3, #0
+ // Go to compare
+ b.n test_done
+
+write_word:
+ // Load one word from address in r0, increment by 4
+ ldr.w ip, [r1], #4
+ // Store the word to address in r1, increment by 4
+ str.w ip, [r0], #4
+ // Increment r3
+ adds r3, #1
+
+test_done:
+ // Compare r3 and r2
+ cmp r3, r2
+ // Loop if not zero
+ bcc.n write_word
+
+ // Set breakpoint to exit
+ bkpt #0x00
+
}
#define CODE_BREAK_NUM 6
+#define CODE_LIT_NUM 2
#define CODE_BREAK_LOW 0x01
#define CODE_BREAK_HIGH 0x02
static void init_code_breakpoints(stlink_t *sl) {
memset(sl->q_buf, 0, 4);
stlink_write_debug32(sl, CM3_REG_FP_CTRL, 0x03 /*KEY | ENABLE4*/);
- printf("KARL - should read back as 0x03, not 60 02 00 00\n");
- stlink_read_debug32(sl, CM3_REG_FP_CTRL);
+ unsigned int val = stlink_read_debug32(sl, CM3_REG_FP_CTRL);
+ if (((val & 3) != 1) ||
+ ((((val >> 8) & 0x70) | ((val >> 4) & 0xf)) != CODE_BREAK_NUM) ||
+ (((val >> 8) & 0xf) != CODE_LIT_NUM)){
+ fprintf(stderr, "[FP_CTRL] = 0x%08x expecting 0x%08x\n", val,
+ ((CODE_BREAK_NUM & 0x70) << 8) | (CODE_LIT_NUM << 8) | ((CODE_BREAK_NUM & 0xf) << 4) | 1);
+ }
+
for(int i = 0; i < CODE_BREAK_NUM; i++) {
code_breaks[i].type = 0;
}
int main(int ac, char** av) {
- struct stlinky *st;
+ struct stlinky *st=NULL;
sig_init();
size_t off;
int num_empty = 0;
unsigned char erased_pattern = (sl->chip_id == STM32_CHIPID_L1_MEDIUM || sl->chip_id == STM32_CHIPID_L1_MEDIUM_PLUS
- || sl->chip_id == STM32_CHIPID_L1_HIGH) ? 0:0xff;
+ || sl->chip_id == STM32_CHIPID_L1_HIGH || sl->chip_id == STM32_CHIPID_L152_RE) ? 0:0xff;
const int fd = open(path, O_RDWR | O_TRUNC | O_CREAT, 00700);
if (fd == -1) {
fprintf(stdout, "Erase Final CR:0x%x\n", read_flash_cr(sl));
#endif
} else if (sl->chip_id == STM32_CHIPID_L1_MEDIUM || sl->chip_id == STM32_CHIPID_L1_MEDIUM_PLUS
- || sl->chip_id == STM32_CHIPID_L1_HIGH) {
+ || sl->chip_id == STM32_CHIPID_L1_HIGH || sl->chip_id == STM32_CHIPID_L152_RE) {
uint32_t val;
int stlink_erase_flash_mass(stlink_t *sl) {
if (sl->chip_id == STM32_CHIPID_L1_MEDIUM || sl->chip_id == STM32_CHIPID_L1_MEDIUM_PLUS
- || sl->chip_id == STM32_CHIPID_L1_HIGH) {
+ || sl->chip_id == STM32_CHIPID_L1_HIGH || sl->chip_id == STM32_CHIPID_L152_RE) {
/* erase each page */
int i = 0, num_pages = sl->flash_size/sl->flash_pgsz;
for (i = 0; i < num_pages; i++) {
size_t loader_size;
if (sl->chip_id == STM32_CHIPID_L1_MEDIUM || sl->chip_id == STM32_CHIPID_L1_MEDIUM_PLUS
- || sl->chip_id == STM32_CHIPID_L1_HIGH ) { /* stm32l */
+ || sl->chip_id == STM32_CHIPID_L1_HIGH || sl->chip_id == STM32_CHIPID_L152_RE ) { /* stm32l */
loader_code = loader_code_stm32l;
loader_size = sizeof(loader_code_stm32l);
} else if (sl->core_id == STM32VL_CORE_ID || sl->chip_id == STM32_CHIPID_F3 || sl->chip_id == STM32_CHIPID_F37x) {
} //STM32F4END
else if (sl->chip_id == STM32_CHIPID_L1_MEDIUM || sl->chip_id == STM32_CHIPID_L1_MEDIUM_PLUS
- || sl->chip_id == STM32_CHIPID_L1_HIGH ) {
+ || sl->chip_id == STM32_CHIPID_L1_HIGH || sl->chip_id == STM32_CHIPID_L152_RE ) {
/* use fast word write. todo: half page. */
uint32_t val;
int err;
unsigned int num_empty = 0, index;
unsigned char erased_pattern =(sl->chip_id == STM32_CHIPID_L1_MEDIUM || sl->chip_id == STM32_CHIPID_L1_MEDIUM_PLUS
- || sl->chip_id == STM32_CHIPID_L1_HIGH )?0:0xff;
+ || sl->chip_id == STM32_CHIPID_L1_HIGH || sl->chip_id == STM32_CHIPID_L152_RE )?0:0xff;
mapped_file_t mf = MAPPED_FILE_INITIALIZER;
if (map_file(&mf, path) == -1) {
ELOG("map_file() == -1\n");
}
if (sl->chip_id == STM32_CHIPID_L1_MEDIUM || sl->chip_id == STM32_CHIPID_L1_MEDIUM_PLUS
- || sl->chip_id == STM32_CHIPID_L1_HIGH ) {
+ || sl->chip_id == STM32_CHIPID_L1_HIGH || sl->chip_id == STM32_CHIPID_L152_RE ) {
size_t count = size / sizeof(uint32_t);
if (size % sizeof(uint32_t)) ++count;
/* check written byte count */
if (sl->chip_id == STM32_CHIPID_L1_MEDIUM || sl->chip_id == STM32_CHIPID_L1_MEDIUM_PLUS
- || sl->chip_id == STM32_CHIPID_L1_HIGH ) {
+ || sl->chip_id == STM32_CHIPID_L1_HIGH || sl->chip_id == STM32_CHIPID_L152_RE ) {
size_t count = size / sizeof(uint32_t);
if (size % sizeof(uint32_t)) ++count;
* 0x436 HIGH.
*/
#define STM32_CHIPID_L1_HIGH 0x436
+#define STM32_CHIPID_L152_RE 0x437
#define STM32_CHIPID_F1_CONN 0x418
#define STM32_CHIPID_F1_VL_MEDIUM 0x420
#define STM32_CHIPID_F1_VL_HIGH 0x428
.bootrom_base = 0x1ff00000,
.bootrom_size = 0x1000
},
-
+ {
+ .chip_id = STM32_CHIPID_L152_RE,
+ .description = "L152RE",
+ .flash_size_reg = 0x1ff800cc,
+ .flash_pagesize = 0x100,
+ .sram_size = 0x14000, /*Not completely clear if there are some with 32K*/
+ .bootrom_base = 0x1ff00000,
+ .bootrom_size = 0x1000
+ },
{
.chip_id = STM32_CHIPID_F1_CONN,
.description = "F1 Connectivity line device",