Removed some more ds390 leftovers in mcs51

A better fix for ifx parameters being made REG_CND

git-svn-id: https://sdcc.svn.sourceforge.net/svnroot/sdcc/trunk/sdcc@760 4a8a32a2-be11-0410-ad9d-d568d2c75423

diff --git a/src/ds390/ralloc.c b/src/ds390/ralloc.c
index 9d5fbc769324699d5e780093c65b9c40ff99f0c9..871e761ff8a1070b4c8d7c7fd3c10a1690d61e70 100644 (file)
--- a/src/ds390/ralloc.c
+++ b/src/ds390/ralloc.c
@@ -2026,17 +2026,17 @@ isBitwiseOptimizable (iCode * ic)
   /* bitwise operations are considered optimizable
      under the following conditions (Jean-Louis VERN) 
 
-     x & lit   <== jwk: should be x && lit
+     x & lit
      bit & bit
      bit & x
      bit ^ bit
      bit ^ x
-     x   ^ lit <== jwk: should be x ^^ lit
-     x   | lit <== jwk: should be x || lit
+     x   ^ lit
+     x   | lit
      bit | bit
      bit | x
    */
-  if ( /* jwk IS_LITERAL (rtype) || */
+  if ( IS_LITERAL (rtype) ||
       (IS_BITVAR (ltype) && IN_BITSPACE (SPEC_OCLS (ltype))))
     return TRUE;
   else
@@ -2329,6 +2329,7 @@ packRegisters (eBBlock * ebp)
            }
        }
 
+#if 0
       /* if the condition of an if instruction
          is defined in the previous instruction then
          mark the itemp as a conditional */
@@ -2342,6 +2343,22 @@ packRegisters (eBBlock * ebp)
          OP_SYMBOL (IC_RESULT (ic))->regType = REG_CND;
          continue;
        }
+#else
+      /* if the condition of an if instruction
+         is defined in the previous instruction and
+        this is the only usage then
+         mark the itemp as a conditional */
+      if ((IS_CONDITIONAL (ic) ||
+          (IS_BITWISE_OP(ic) && isBitwiseOptimizable (ic))) &&
+         ic->next && ic->next->op == IFX &&
+         bitVectnBitsOn (OP_USES(IC_RESULT(ic)))==1 &&
+         isOperandEqual (IC_RESULT (ic), IC_COND (ic->next)) &&
+         OP_SYMBOL (IC_RESULT (ic))->liveTo <= ic->next->seq)
+       {
+         OP_SYMBOL (IC_RESULT (ic))->regType = REG_CND;
+         continue;
+       }
+#endif
 
       /* reduce for support function calls */
       if (ic->supportRtn || ic->op == '+' || ic->op == '-')

diff --git a/src/mcs51/gen.c b/src/mcs51/gen.c
index f4f069deba928771602f3c4497d84dca9748ad3d..446618b4059582a0673ad1e908b438f5fcb2a230 100644 (file)
--- a/src/mcs51/gen.c
+++ b/src/mcs51/gen.c
@@ -252,21 +252,6 @@ newAsmop (short type)
   return aop;
 }
 
-static void
-genSetDPTR (int n)
-{
-  if (!n)
-    {
-      emitcode (";", "Select standard DPTR");
-      emitcode ("mov", "dps, #0x00");
-    }
-  else
-    {
-      emitcode (";", "Select alternate DPTR");
-      emitcode ("mov", "dps, #0x01");
-    }
-}
-
 /*-----------------------------------------------------------------*/
 /* pointerCode - returns the code for a pointer type               */
 /*-----------------------------------------------------------------*/
@@ -779,13 +764,6 @@ aopGet (asmop * aop, int offset, bool bit16, bool dname)
       return rs;
 
     case AOP_DPTR:
-    case AOP_DPTR2:
-
-      if (aop->type == AOP_DPTR2)
-       {
-         genSetDPTR (1);
-       }
-
       while (offset > aop->coff)
        {
          emitcode ("inc", "dptr");
@@ -808,12 +786,6 @@ aopGet (asmop * aop, int offset, bool bit16, bool dname)
        {
          emitcode ("movx", "a,@dptr");
        }
-
-      if (aop->type == AOP_DPTR2)
-       {
-         genSetDPTR (0);
-       }
-
       return (dname ? "acc" : "a");
 
 
@@ -929,13 +901,6 @@ aopPut (asmop * aop, char *s, int offset)
       break;
 
     case AOP_DPTR:
-    case AOP_DPTR2:
-
-      if (aop->type == AOP_DPTR2)
-       {
-         genSetDPTR (1);
-       }
-
       if (aop->code)
        {
          werror (E_INTERNAL_ERROR, __FILE__, __LINE__,
@@ -961,11 +926,6 @@ aopPut (asmop * aop, char *s, int offset)
       MOVA (s);
 
       emitcode ("movx", "@dptr,a");
-
-      if (aop->type == AOP_DPTR2)
-       {
-         genSetDPTR (0);
-       }
       break;
 
     case AOP_R0:
@@ -1111,7 +1071,6 @@ pointToEnd (asmop * aop)
 static void
 reAdjustPreg (asmop * aop)
 {
-  aop->coff = 0;
   if ((aop->coff==0) || aop->size <= 1)
     return;
 
@@ -1123,24 +1082,13 @@ reAdjustPreg (asmop * aop)
        emitcode ("dec", "%s", aop->aopu.aop_ptr->name);
       break;
     case AOP_DPTR:
-    case AOP_DPTR2:
-      if (aop->type == AOP_DPTR2)
-       {
-         genSetDPTR (1);
-       }
       while (aop->coff--)
        {
          emitcode ("lcall", "__decdptr");
        }
-
-      if (aop->type == AOP_DPTR2)
-       {
-         genSetDPTR (0);
-       }
       break;
-
     }
-
+  aop->coff = 0;
 }
 
 #define AOP(op) op->aop
@@ -1150,8 +1098,7 @@ reAdjustPreg (asmop * aop)
                        AOP_TYPE(x) == AOP_R0))
 
 #define AOP_NEEDSACC(x) (AOP(x) && (AOP_TYPE(x) == AOP_CRY ||  \
-                        AOP_TYPE(x) == AOP_DPTR || AOP_TYPE(x) == AOP_DPTR2 || \
-                         AOP(x)->paged))
+                        AOP_TYPE(x) == AOP_DPTR || AOP(x)->paged))
 
 #define AOP_INPREG(x) (x && (x->type == AOP_REG &&                        \
                       (x->aopu.aop_reg[0] == mcs51_regWithIdx(R0_IDX) || \
@@ -4242,6 +4189,7 @@ genAnd (iCode * ic, iCode * ifx)
   int bytelit = 0;
   char buffer[10];
 
+  catchMe();
   aopOp ((left = IC_LEFT (ic)), ic, FALSE);
   aopOp ((right = IC_RIGHT (ic)), ic, FALSE);
   aopOp ((result = IC_RESULT (ic)), ic, TRUE);
@@ -7847,8 +7795,7 @@ genAssign (iCode * ic)
   aopOp (right, ic, FALSE);
 
   /* special case both in far space */
-  if ((AOP_TYPE (right) == AOP_DPTR ||
-       AOP_TYPE (right) == AOP_DPTR2) &&
+  if (AOP_TYPE (right) == AOP_DPTR &&
       IS_TRUE_SYMOP (result) &&
       isOperandInFarSpace (result))
     {

diff --git a/src/mcs51/gen.h b/src/mcs51/gen.h
index 4c5045793fc613ddbcf9093e40de992cda06c666..c9bb7cc6893f4549c61a68c24844c201b7cd3564 100644 (file)
--- a/src/mcs51/gen.h
+++ b/src/mcs51/gen.h
@@ -29,7 +29,7 @@ enum
   {
     AOP_LIT = 1,
     AOP_REG, AOP_DIR,
-    AOP_DPTR, AOP_DPTR2, AOP_R0, AOP_R1,
+    AOP_DPTR, AOP_R0, AOP_R1,
     AOP_STK, AOP_IMMD, AOP_STR,
     AOP_CRY, AOP_ACC
   };

diff --git a/src/mcs51/ralloc.c b/src/mcs51/ralloc.c
index 1f77e864200cfa9e3862790d601f0e34bb901603..9d42ffeae9cf0befafa9a052dd09473cbe9fdf8c 100644 (file)
--- a/src/mcs51/ralloc.c
+++ b/src/mcs51/ralloc.c
@@ -2033,18 +2033,23 @@ static bool
 isBitwiseOptimizable (iCode * ic)
 {
   sym_link *ltype = getSpec (operandType (IC_LEFT (ic)));
+  sym_link *rtype = getSpec (operandType (IC_RIGHT (ic)));
 
   /* bitwise operations are considered optimizable
      under the following conditions (Jean-Louis VERN) 
 
+     x & lit
      bit & bit
      bit & x
      bit ^ bit
      bit ^ x
+     x   ^ lit
+     x   | lit
      bit | bit
      bit | x
-   */
-  if ((IS_BITVAR (ltype) && IN_BITSPACE (SPEC_OCLS (ltype))))
+  */
+  if (IS_LITERAL(rtype) ||
+      (IS_BITVAR (ltype) && IN_BITSPACE (SPEC_OCLS (ltype))))
     return TRUE;
   else
     return FALSE;
@@ -2331,6 +2336,7 @@ packRegisters (eBBlock * ebp)
            }
        }
 
+#if 0
       /* if the condition of an if instruction
          is defined in the previous instruction then
          mark the itemp as a conditional */
@@ -2343,6 +2349,22 @@ packRegisters (eBBlock * ebp)
          OP_SYMBOL (IC_RESULT (ic))->regType = REG_CND;
          continue;
        }
+#else
+      /* if the condition of an if instruction
+         is defined in the previous instruction and
+        this is the only usage then
+         mark the itemp as a conditional */
+      if ((IS_CONDITIONAL (ic) ||
+          (IS_BITWISE_OP(ic) && isBitwiseOptimizable (ic))) &&
+         ic->next && ic->next->op == IFX &&
+         bitVectnBitsOn (OP_USES(IC_RESULT(ic)))==1 &&
+         isOperandEqual (IC_RESULT (ic), IC_COND (ic->next)) &&
+         OP_SYMBOL (IC_RESULT (ic))->liveTo <= ic->next->seq)
+       {
+         OP_SYMBOL (IC_RESULT (ic))->regType = REG_CND;
+         continue;
+       }
+#endif
 
       /* reduce for support function calls */
       if (ic->supportRtn || ic->op == '+' || ic->op == '-')