target/cortex_a: check dscr before timeout
authorAntonio Borneo <borneo.antonio@gmail.com>
Mon, 15 Apr 2019 20:32:32 +0000 (22:32 +0200)
committerMatthias Welwarsky <matthias@welwarsky.de>
Wed, 24 Apr 2019 13:09:32 +0000 (14:09 +0100)
In function cortex_a_wait_dscr_bits() the last read on dscr gets
ignored in case of timeout, even if it finally provides the value
that would trigger a successful return.

Check the returned value before testing the timeout.
Also, print a message on failure reading dscr.

Change-Id: I261ac1545113db39374833a55be911a4da71d893
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/5112
Tested-by: jenkins
Reviewed-by: Matthias Welwarsky <matthias@welwarsky.de>
src/target/cortex_a.c

index 8ed81b78f97b12ce8cc367d616b0f32f0319a78a..587cbba0e91b36a3d1b7bd4afaaa8e5fb734ac8c 100644 (file)
@@ -1765,14 +1765,22 @@ static int cortex_a_wait_dscr_bits(struct target *target, uint32_t mask,
 {
        /* Waits until the specified bit(s) of DSCR take on a specified value. */
        struct armv7a_common *armv7a = target_to_armv7a(target);
-       int64_t then = timeval_ms();
+       int64_t then;
        int retval;
 
-       while ((*dscr & mask) != value) {
+       if ((*dscr & mask) == value)
+               return ERROR_OK;
+
+       then = timeval_ms();
+       while (1) {
                retval = mem_ap_read_atomic_u32(armv7a->debug_ap,
                                armv7a->debug_base + CPUDBG_DSCR, dscr);
-               if (retval != ERROR_OK)
+               if (retval != ERROR_OK) {
+                       LOG_ERROR("Could not read DSCR register");
                        return retval;
+               }
+               if ((*dscr & mask) == value)
+                       break;
                if (timeval_ms() > then + 1000) {
                        LOG_ERROR("timeout waiting for DSCR bit change");
                        return ERROR_FAIL;