cortex_m: fix bug in poll() machine state (external resume awareness)
authorTarek BOCHKATI <tarek.bouchkati@gmail.com>
Fri, 21 Dec 2018 18:34:58 +0000 (19:34 +0100)
committerTomas Vanek <vanekt@fbl.cz>
Wed, 16 Jan 2019 10:53:24 +0000 (10:53 +0000)
This patch covers the fact that cortex_m could be resumed externally by
Cross Trigger Interface or by direct write to DHSCR ...

To reproduce:
 - halt the target
 - then run the core through DHCSR (mww 0xe000edf0 0xa05f0001)
 => this resumes the core, but target state in OpenOCD remains HALTED.

Change-Id: Ifa1ae18645bfeb863acc78a039bbf04873fd78fe
Signed-off-by: Tarek BOCHKATI <tarek.bouchkati@gmail.com>
Reviewed-on: http://openocd.zylin.com/4817
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
src/target/cortex_m.c

index e8ad770ec1f6e663cb5cf3d44a7b4e64ec98e848..06e1c1c754ce5f0716a227445a121f1f15f7fa2f 100644 (file)
@@ -564,6 +564,17 @@ static int cortex_m_poll(struct target *target)
                }
        }
 
+       /* Check that target is truly halted, since the target could be resumed externally */
+       if ((prev_target_state == TARGET_HALTED) && !(cortex_m->dcb_dhcsr & S_HALT)) {
+               /* registers are now invalid */
+               register_cache_invalidate(armv7m->arm.core_cache);
+
+               target->state = TARGET_RUNNING;
+               LOG_WARNING("%s: external resume detected", target_name(target));
+               target_call_event_callbacks(target, TARGET_EVENT_RESUMED);
+               retval = ERROR_OK;
+       }
+
        /* Did we detect a failure condition that we cleared? */
        if (detected_failure != ERROR_OK)
                retval = detected_failure;