* device/include/mc68hc908qy.h: corrected declarations of FLBPR and

OSCTRIMVAL as noted in bug #916008

git-svn-id: https://sdcc.svn.sourceforge.net/svnroot/sdcc/trunk/sdcc@3266 4a8a32a2-be11-0410-ad9d-d568d2c75423

diff --git a/ChangeLog b/ChangeLog
index d39a852ff75c5bc99efa6083761d55bd9c299923..0b9f426042c015ffec61f7500e6a4ff49fc45142 100644 (file)
--- a/ChangeLog
+++ b/ChangeLog
@@ -1,3 +1,8 @@
+2004-03-14 Erik Petrich <epetrich AT ivorytower.norman.ok.us>
+
+       * device/include/mc68hc908qy.h: corrected declarations of FLBPR and
+       OSCTRIMVAL as noted in bug #916008
+
 2004-03-14 Erik Petrich <epetrich AT ivorytower.norman.ok.us>
 
        * src/SDCCloop.c (basicInduction): fixed bug with loop induction

diff --git a/device/include/mc68hc908qy.h b/device/include/mc68hc908qy.h
index 84ea28a1b17e84db152aa500b145c89c961a7a8e..10c78037e966c752106e5fa5aee960c81538c3fe 100644 (file)
--- a/device/include/mc68hc908qy.h
+++ b/device/include/mc68hc908qy.h
@@ -249,8 +249,8 @@ VOLXDATA UINT8 at 0xfe0b BRKSCR;  /* Break Status and Control Register */
 VOLXDATA UINT8 at 0xfe0c LVISR;   /* LVI Status Register */
   #define LVIOUT ((struct _hc08_bits *)(&LVISR))->bit7
 
-VOLXDATA UINT8 at 0xfebe FLBPR;   /* FLASH Block Protect Register */
-VOLXDATA UINT8 at 0xfec0 OSCTRIMVAL; /* Oscillator Trim Value */
+VOLXDATA UINT8 at 0xffbe FLBPR;   /* FLASH Block Protect Register */
+VOLXDATA UINT8 at 0xffc0 OSCTRIMVAL; /* Oscillator Trim Value */
 VOLXDATA UINT8 at 0xffff COPCTL;  /* COP Control Register */