* src/mcs51/gen.c (sameReg): new, checks if two aop regs are the same,

  (genSend): bugfix, do not allocate and free twice,
  (shiftRLong): handle partially overlapping aops
* support/regression/tests/bitopcse.c: fixed warning redefined idata

git-svn-id: https://sdcc.svn.sourceforge.net/svnroot/sdcc/trunk/sdcc@4059 4a8a32a2-be11-0410-ad9d-d568d2c75423

diff --git a/ChangeLog b/ChangeLog
index 98dcfacd6262e520d881634c9d02b40b4f8ed25c..540e2ce49bd4f3205f31057f6ab57cf0f05136c2 100644 (file)
--- a/ChangeLog
+++ b/ChangeLog
@@ -1,3 +1,10 @@
+2006-03-10 Maarten Brock <sourceforge.brock AT dse.nl>
+
+       * src/mcs51/gen.c (sameReg): new, checks if two aop regs are the same,
+         (genSend): bugfix, do not allocate and free twice,
+         (shiftRLong): handle partially overlapping aops
+       * support/regression/tests/bitopcse.c: fixed warning redefined idata
+
 2006-03-08 Borut Razem <borut.razem AT siol.net>
 
        * support/regression/fwk/include/testfwk.h: added defines for xdata, idata

diff --git a/src/mcs51/gen.c b/src/mcs51/gen.c
index 82408a9600009aa879fbabef99a1b88631a7ba5f..84729c5f2730912f6268611f98cd5dcd8406a934 100644 (file)
--- a/src/mcs51/gen.c
+++ b/src/mcs51/gen.c
@@ -809,6 +809,24 @@ operandsEqu (operand * op1, operand * op2)
   return FALSE;
 }
 
+/*-----------------------------------------------------------------*/
+/* sameReg - two asmops have the same register at given offsets    */
+/*-----------------------------------------------------------------*/
+static bool
+sameReg (asmop * aop1, int off1, asmop * aop2, int off2)
+{
+  if (aop1->type != AOP_REG && aop1->type != AOP_CRY)
+    return FALSE;
+
+  if (aop1->type != aop2->type)
+    return FALSE;
+
+  if (aop1->aopu.aop_reg[off1] != aop2->aopu.aop_reg[off2])
+    return FALSE;
+
+  return TRUE;
+}
+
 /*-----------------------------------------------------------------*/
 /* sameRegs - two asmops have the same registers                   */
 /*-----------------------------------------------------------------*/
@@ -830,8 +848,7 @@ sameRegs (asmop * aop1, asmop * aop2)
     return FALSE;
 
   for (i = 0; i < aop1->size; i++)
-    if (aop1->aopu.aop_reg[i] !=
-        aop2->aopu.aop_reg[i])
+    if (aop1->aopu.aop_reg[i] != aop2->aopu.aop_reg[i])
       return FALSE;
 
   return TRUE;
@@ -2593,12 +2610,12 @@ static void genSend(set *sendSet)
   for (sic = setFirstItem (sendSet); sic;
        sic = setNextItem (sendSet))
     {
-      aopOp (IC_LEFT (sic), sic, FALSE);
-
       if (sic->argreg > 12)
         {
           int bit = sic->argreg-13;
 
+          aopOp (IC_LEFT (sic), sic, FALSE);
+
           /* if left is a literal then
              we know what the value is */
           if (AOP_TYPE (IC_LEFT (sic)) == AOP_LIT)
@@ -2625,8 +2642,9 @@ static void genSend(set *sendSet)
             }
           bit_count++;
           BitBankUsed = 1;
+
+          freeAsmop (IC_LEFT (sic), NULL, sic, TRUE);
         }
-      freeAsmop (IC_LEFT (sic), NULL, sic, TRUE);
     }
 
   if (bit_count)
@@ -2639,30 +2657,33 @@ static void genSend(set *sendSet)
   for (sic = setFirstItem (sendSet); sic;
        sic = setNextItem (sendSet))
     {
-      int size, offset = 0;
-      aopOp (IC_LEFT (sic), sic, FALSE);
-      size = AOP_SIZE (IC_LEFT (sic));
-
-      if (sic->argreg == 1)
+      if (sic->argreg <= 12)
         {
-          while (size--)
+          int size, offset = 0;
+          aopOp (IC_LEFT (sic), sic, FALSE);
+          size = AOP_SIZE (IC_LEFT (sic));
+
+          if (sic->argreg == 1)
             {
-              char *l = aopGet (IC_LEFT (sic), offset, FALSE, FALSE);
-              if (strcmp (l, fReturn[offset]))
-                  emitcode ("mov", "%s,%s", fReturn[offset], l);
-              offset++;
+              while (size--)
+                {
+                  char *l = aopGet (IC_LEFT (sic), offset, FALSE, FALSE);
+                  if (strcmp (l, fReturn[offset]))
+                      emitcode ("mov", "%s,%s", fReturn[offset], l);
+                  offset++;
+                }
             }
-        }
-      else if (sic->argreg <= 12)
-        {
-          while (size--)
+          else
             {
-              emitcode ("mov","%s,%s", rb1regs[sic->argreg+offset-5],
-                        aopGet (IC_LEFT (sic), offset,FALSE, FALSE));
-              offset++;
+              while (size--)
+                {
+                  emitcode ("mov","%s,%s", rb1regs[sic->argreg+offset-5],
+                            aopGet (IC_LEFT (sic), offset,FALSE, FALSE));
+                  offset++;
+                }
             }
+          freeAsmop (IC_LEFT (sic), NULL, sic, TRUE);
         }
-      freeAsmop (IC_LEFT (sic), NULL, sic, TRUE);
     }
 }
 
@@ -8771,59 +8792,89 @@ static void
 shiftRLong (operand * left, int offl,
             operand * result, int sign)
 {
-  int isSameRegs = sameRegs (AOP (left), AOP (result));
+  bool useSameRegs = regsInCommon (left, result);
 
-  if (isSameRegs && offl>1) {
-    // we are in big trouble, but this shouldn't happen
-    werror(E_INTERNAL_ERROR, __FILE__, __LINE__);
-  }
+  if (useSameRegs && offl>1)
+    {
+      // we are in big trouble, but this shouldn't happen
+      werror(E_INTERNAL_ERROR, __FILE__, __LINE__);
+    }
 
   MOVA (aopGet (left, MSB32, FALSE, FALSE));
 
-  if (offl==MSB16) {
-    // shift is > 8
-    if (sign) {
-      emitcode ("rlc", "a");
-      emitcode ("subb", "a,acc");
-      if (isSameRegs)
-        emitcode ("xch", "a,%s", aopGet (left, MSB32, FALSE, FALSE));
-      else {
-        aopPut (result, "a", MSB32, isOperandVolatile (result, FALSE));
-        MOVA (aopGet (left, MSB32, FALSE, FALSE));
-      }
-    } else {
-      aopPut (result, zero, MSB32, isOperandVolatile (result, FALSE));
+  if (offl==MSB16)
+    {
+      // shift is > 8
+      if (sign)
+           {
+          emitcode ("rlc", "a");
+          emitcode ("subb", "a,acc");
+          if (useSameRegs && sameReg (AOP (left), MSB32, AOP (result), MSB32))
+                   {
+              emitcode ("xch", "a,%s", aopGet (left, MSB32, FALSE, FALSE));
+                   }
+          else
+                   {
+              aopPut (result, "a", MSB32, isOperandVolatile (result, FALSE));
+              MOVA (aopGet (left, MSB32, FALSE, FALSE));
+                   }
+           }
+         else
+           {
+          aopPut (result, zero, MSB32, isOperandVolatile (result, FALSE));
+           }
     }
-  }
 
-  if (!sign) {
-    emitcode ("clr", "c");
-  } else {
-    emitcode ("mov", "c,acc.7");
-  }
+  if (!sign)
+    {
+      emitcode ("clr", "c");
+    }
+  else
+    {
+      emitcode ("mov", "c,acc.7");
+    }
 
   emitcode ("rrc", "a");
 
-  if (isSameRegs && offl==MSB16) {
-    emitcode ("xch", "a,%s",aopGet (left, MSB24, FALSE, FALSE));
-  } else {
-    aopPut (result, "a", MSB32-offl, isOperandVolatile (result, FALSE));
-    MOVA (aopGet (left, MSB24, FALSE, FALSE));
-  }
+  if (useSameRegs && offl==MSB16 &&
+      sameReg (AOP (left), MSB24, AOP (result), MSB32-offl))
+    {
+      emitcode ("xch", "a,%s",aopGet (left, MSB24, FALSE, FALSE));
+    }
+  else
+    {
+      aopPut (result, "a", MSB32-offl, isOperandVolatile (result, FALSE));
+      MOVA (aopGet (left, MSB24, FALSE, FALSE));
+    }
 
   emitcode ("rrc", "a");
-  if (isSameRegs && offl==1) {
-    emitcode ("xch", "a,%s",aopGet (left, MSB16, FALSE, FALSE));
-  } else {
-    aopPut (result, "a", MSB24-offl, isOperandVolatile (result, FALSE));
-    MOVA (aopGet (left, MSB16, FALSE, FALSE));
-  }
+  if (useSameRegs && offl==1 &&
+      sameReg (AOP (left), MSB16, AOP (result), MSB24-offl))
+    {
+      emitcode ("xch", "a,%s",aopGet (left, MSB16, FALSE, FALSE));
+    }
+  else
+    {
+      aopPut (result, "a", MSB24-offl, isOperandVolatile (result, FALSE));
+      MOVA (aopGet (left, MSB16, FALSE, FALSE));
+    }
   emitcode ("rrc", "a");
-  aopPut (result, "a", MSB16 - offl, isOperandVolatile (result, FALSE));
-
-  if (offl == LSB)
+  if (offl != LSB)
+    {
+      aopPut (result, "a", MSB16 - offl, isOperandVolatile (result, FALSE));
+    }
+  else
     {
-      MOVA (aopGet (left, LSB, FALSE, FALSE));
+      if (useSameRegs &&
+          sameReg (AOP (left), LSB, AOP (result), MSB16-offl))
+        {
+          emitcode ("xch", "a,%s",aopGet (left, LSB, FALSE, FALSE));
+        }
+      else
+        {
+          aopPut (result, "a", MSB16 - offl, isOperandVolatile (result, FALSE));
+          MOVA (aopGet (left, LSB, FALSE, FALSE));
+           }
       emitcode ("rrc", "a");
       aopPut (result, "a", LSB, isOperandVolatile (result, FALSE));
     }

diff --git a/support/regression/tests/bitopcse.c b/support/regression/tests/bitopcse.c
index f8e5824148e71a2fb6c3b6b356b4e46b3480aa02..b8118bd3fe776070c7c1be503c362eb37aa47424 100644 (file)
--- a/support/regression/tests/bitopcse.c
+++ b/support/regression/tests/bitopcse.c
@@ -10,20 +10,24 @@
 #define _{type}
 
 
+#if defined(_bit) || defined(SDCC_hc08)
+#  define _data
+#else
+#  define _data idata
+#endif
+
 #if defined(PORT_HOST) || defined(SDCC_z80) || defined(SDCC_gbz80) || defined(SDCC_hc08)
 #  define NO_BIT_TYPE
 #endif
 
 #if defined(_bit) && !defined(NO_BIT_TYPE)
 #  define MASK 1
-#  define idata
 #elif defined(_bit) && defined(NO_BIT_TYPE)
 #  if defined(PORT_HOST)
 #    define MASK 0xffffffff
 #  else
 #    define MASK 0xffff
 #  endif
-#  define idata
 #  define bit int
 #elif defined(_char)
 #  define MASK 0xff
@@ -35,23 +39,18 @@
 #  warning Unknown type
 #endif
 
-#if defined(PORT_HOST) || defined(SDCC_z80) || defined(SDCC_gbz80) || defined(SDCC_hc08)
-#  define idata
-#  define code
-#endif
-
 /* the variable 'mask' is only defined to see if MASK is correctly set up */
-code unsigned long mask = MASK;
+const unsigned long mask = MASK;
 
       volatile          {type}  v;
       volatile unsigned {type} uv;
 /* an array would be nicer, but an array of bits isn't possible */
-idata                   {type}  a0 , a1 , a2 , a3 , a4 , a5 , a6 , a7 , a8 , a9 ,
-                               a10, a11, a12, a13, a14, a15, a16, a17, a18, a19,
-                               a20;
-idata          unsigned {type} ua0, ua1, ua2, ua3, ua4, ua5, ua6;
-idata                   {type}  b;
-idata volatile unsigned {type} ub = 0xbe;
+_data                   {type}  a0 , a1 , a2 , a3 , a4 , a5 , a6 , a7 , a8 , a9 ,
+                                a10, a11, a12, a13, a14, a15, a16, a17, a18, a19,
+                                a20;
+_data          unsigned {type} ua0, ua1, ua2, ua3, ua4, ua5, ua6;
+_data                   {type}  b;
+_data volatile unsigned {type} ub = 0xbe;
 
 void
 testcse(void)