- add svn props from previous commit

git-svn-id: svn://svn.berlios.de/openocd/trunk@1452 b42882b7-edfa-0310-969c-e2dbd0fdcd60

diff --git a/src/flash/nand_ecc.c b/src/flash/nand_ecc.c
index 27777c362c1713901a4f6fbe07489845828b6e1d..91dd8c6b8f44f3c6eef299bb7d255856b92266c8 100644 (file)
--- a/src/flash/nand_ecc.c
+++ b/src/flash/nand_ecc.c
@@ -1,126 +1,126 @@
-/*\r
- * This file contains an ECC algorithm from Toshiba that allows for detection\r
- * and correction of 1-bit errors in a 256 byte block of data.\r
- *\r
- * [ Extracted from the initial code found in some early Linux versions.\r
- *   The current Linux code is bigger while being faster, but this is of\r
- *   no real benefit when the bottleneck largely remains the JTAG link.  ]\r
- *\r
- * Copyright (C) 2000-2004 Steven J. Hill (sjhill at realitydiluted.com)\r
- *                         Toshiba America Electronics Components, Inc.\r
- *\r
- * Copyright (C) 2006 Thomas Gleixner <tglx at linutronix.de>\r
- *\r
- * This file is free software; you can redistribute it and/or modify it\r
- * under the terms of the GNU General Public License as published by the\r
- * Free Software Foundation; either version 2 or (at your option) any\r
- * later version.\r
- *\r
- * This file is distributed in the hope that it will be useful, but WITHOUT\r
- * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or\r
- * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License\r
- * for more details.\r
- *\r
- * You should have received a copy of the GNU General Public License along\r
- * with this file; if not, write to the Free Software Foundation, Inc.,\r
- * 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA.\r
- *\r
- * As a special exception, if other files instantiate templates or use\r
- * macros or inline functions from these files, or you compile these\r
- * files and link them with other works to produce a work based on these\r
- * files, these files do not by themselves cause the resulting work to be\r
- * covered by the GNU General Public License. However the source code for\r
- * these files must still be made available in accordance with section (3)\r
- * of the GNU General Public License.\r
- *\r
- * This exception does not invalidate any other reasons why a work based on\r
- * this file might be covered by the GNU General Public License.\r
- */\r
-\r
-#ifdef HAVE_CONFIG_H\r
-#include "config.h"\r
-#endif\r
-\r
-#include "replacements.h"\r
-\r
-#include <inttypes.h>\r
-\r
-#include "nand.h"\r
-\r
-/*\r
- * Pre-calculated 256-way 1 byte column parity\r
- */\r
-static const u8 nand_ecc_precalc_table[] = {\r
-       0x00, 0x55, 0x56, 0x03, 0x59, 0x0c, 0x0f, 0x5a, 0x5a, 0x0f, 0x0c, 0x59, 0x03, 0x56, 0x55, 0x00,\r
-       0x65, 0x30, 0x33, 0x66, 0x3c, 0x69, 0x6a, 0x3f, 0x3f, 0x6a, 0x69, 0x3c, 0x66, 0x33, 0x30, 0x65,\r
-       0x66, 0x33, 0x30, 0x65, 0x3f, 0x6a, 0x69, 0x3c, 0x3c, 0x69, 0x6a, 0x3f, 0x65, 0x30, 0x33, 0x66,\r
-       0x03, 0x56, 0x55, 0x00, 0x5a, 0x0f, 0x0c, 0x59, 0x59, 0x0c, 0x0f, 0x5a, 0x00, 0x55, 0x56, 0x03,\r
-       0x69, 0x3c, 0x3f, 0x6a, 0x30, 0x65, 0x66, 0x33, 0x33, 0x66, 0x65, 0x30, 0x6a, 0x3f, 0x3c, 0x69,\r
-       0x0c, 0x59, 0x5a, 0x0f, 0x55, 0x00, 0x03, 0x56, 0x56, 0x03, 0x00, 0x55, 0x0f, 0x5a, 0x59, 0x0c,\r
-       0x0f, 0x5a, 0x59, 0x0c, 0x56, 0x03, 0x00, 0x55, 0x55, 0x00, 0x03, 0x56, 0x0c, 0x59, 0x5a, 0x0f,\r
-       0x6a, 0x3f, 0x3c, 0x69, 0x33, 0x66, 0x65, 0x30, 0x30, 0x65, 0x66, 0x33, 0x69, 0x3c, 0x3f, 0x6a,\r
-       0x6a, 0x3f, 0x3c, 0x69, 0x33, 0x66, 0x65, 0x30, 0x30, 0x65, 0x66, 0x33, 0x69, 0x3c, 0x3f, 0x6a,\r
-       0x0f, 0x5a, 0x59, 0x0c, 0x56, 0x03, 0x00, 0x55, 0x55, 0x00, 0x03, 0x56, 0x0c, 0x59, 0x5a, 0x0f,\r
-       0x0c, 0x59, 0x5a, 0x0f, 0x55, 0x00, 0x03, 0x56, 0x56, 0x03, 0x00, 0x55, 0x0f, 0x5a, 0x59, 0x0c,\r
-       0x69, 0x3c, 0x3f, 0x6a, 0x30, 0x65, 0x66, 0x33, 0x33, 0x66, 0x65, 0x30, 0x6a, 0x3f, 0x3c, 0x69,\r
-       0x03, 0x56, 0x55, 0x00, 0x5a, 0x0f, 0x0c, 0x59, 0x59, 0x0c, 0x0f, 0x5a, 0x00, 0x55, 0x56, 0x03,\r
-       0x66, 0x33, 0x30, 0x65, 0x3f, 0x6a, 0x69, 0x3c, 0x3c, 0x69, 0x6a, 0x3f, 0x65, 0x30, 0x33, 0x66,\r
-       0x65, 0x30, 0x33, 0x66, 0x3c, 0x69, 0x6a, 0x3f, 0x3f, 0x6a, 0x69, 0x3c, 0x66, 0x33, 0x30, 0x65,\r
-       0x00, 0x55, 0x56, 0x03, 0x59, 0x0c, 0x0f, 0x5a, 0x5a, 0x0f, 0x0c, 0x59, 0x03, 0x56, 0x55, 0x00\r
-};\r
-\r
-/*\r
- * nand_calculate_ecc - Calculate 3-byte ECC for 256-byte block\r
- */\r
-int nand_calculate_ecc(struct nand_device_s *device, const u8 *dat, u8 *ecc_code)\r
-{\r
-       u8 idx, reg1, reg2, reg3, tmp1, tmp2;\r
-       int i;\r
-\r
-       /* Initialize variables */\r
-       reg1 = reg2 = reg3 = 0;\r
-\r
-       /* Build up column parity */\r
-       for(i = 0; i < 256; i++) {\r
-               /* Get CP0 - CP5 from table */\r
-               idx = nand_ecc_precalc_table[*dat++];\r
-               reg1 ^= (idx & 0x3f);\r
-\r
-               /* All bit XOR = 1 ? */\r
-               if (idx & 0x40) {\r
-                       reg3 ^= (u8) i;\r
-                       reg2 ^= ~((u8) i);\r
-               }\r
-       }\r
-\r
-       /* Create non-inverted ECC code from line parity */\r
-       tmp1  = (reg3 & 0x80) >> 0; /* B7 -> B7 */\r
-       tmp1 |= (reg2 & 0x80) >> 1; /* B7 -> B6 */\r
-       tmp1 |= (reg3 & 0x40) >> 1; /* B6 -> B5 */\r
-       tmp1 |= (reg2 & 0x40) >> 2; /* B6 -> B4 */\r
-       tmp1 |= (reg3 & 0x20) >> 2; /* B5 -> B3 */\r
-       tmp1 |= (reg2 & 0x20) >> 3; /* B5 -> B2 */\r
-       tmp1 |= (reg3 & 0x10) >> 3; /* B4 -> B1 */\r
-       tmp1 |= (reg2 & 0x10) >> 4; /* B4 -> B0 */\r
-\r
-       tmp2  = (reg3 & 0x08) << 4; /* B3 -> B7 */\r
-       tmp2 |= (reg2 & 0x08) << 3; /* B3 -> B6 */\r
-       tmp2 |= (reg3 & 0x04) << 3; /* B2 -> B5 */\r
-       tmp2 |= (reg2 & 0x04) << 2; /* B2 -> B4 */\r
-       tmp2 |= (reg3 & 0x02) << 2; /* B1 -> B3 */\r
-       tmp2 |= (reg2 & 0x02) << 1; /* B1 -> B2 */\r
-       tmp2 |= (reg3 & 0x01) << 1; /* B0 -> B1 */\r
-       tmp2 |= (reg2 & 0x01) << 0; /* B7 -> B0 */\r
-\r
-       /* Calculate final ECC code */\r
-#ifdef NAND_ECC_SMC\r
-       ecc_code[0] = ~tmp2;\r
-       ecc_code[1] = ~tmp1;\r
-#else\r
-       ecc_code[0] = ~tmp1;\r
-       ecc_code[1] = ~tmp2;\r
-#endif\r
-       ecc_code[2] = ((~reg1) << 2) | 0x03;\r
-\r
-       return 0;\r
-}\r
+/*
+ * This file contains an ECC algorithm from Toshiba that allows for detection
+ * and correction of 1-bit errors in a 256 byte block of data.
+ *
+ * [ Extracted from the initial code found in some early Linux versions.
+ *   The current Linux code is bigger while being faster, but this is of
+ *   no real benefit when the bottleneck largely remains the JTAG link.  ]
+ *
+ * Copyright (C) 2000-2004 Steven J. Hill (sjhill at realitydiluted.com)
+ *                         Toshiba America Electronics Components, Inc.
+ *
+ * Copyright (C) 2006 Thomas Gleixner <tglx at linutronix.de>
+ *
+ * This file is free software; you can redistribute it and/or modify it
+ * under the terms of the GNU General Public License as published by the
+ * Free Software Foundation; either version 2 or (at your option) any
+ * later version.
+ *
+ * This file is distributed in the hope that it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
+ * for more details.
+ *
+ * You should have received a copy of the GNU General Public License along
+ * with this file; if not, write to the Free Software Foundation, Inc.,
+ * 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA.
+ *
+ * As a special exception, if other files instantiate templates or use
+ * macros or inline functions from these files, or you compile these
+ * files and link them with other works to produce a work based on these
+ * files, these files do not by themselves cause the resulting work to be
+ * covered by the GNU General Public License. However the source code for
+ * these files must still be made available in accordance with section (3)
+ * of the GNU General Public License.
+ *
+ * This exception does not invalidate any other reasons why a work based on
+ * this file might be covered by the GNU General Public License.
+ */
+
+#ifdef HAVE_CONFIG_H
+#include "config.h"
+#endif
+
+#include "replacements.h"
+
+#include <inttypes.h>
+
+#include "nand.h"
+
+/*
+ * Pre-calculated 256-way 1 byte column parity
+ */
+static const u8 nand_ecc_precalc_table[] = {
+       0x00, 0x55, 0x56, 0x03, 0x59, 0x0c, 0x0f, 0x5a, 0x5a, 0x0f, 0x0c, 0x59, 0x03, 0x56, 0x55, 0x00,
+       0x65, 0x30, 0x33, 0x66, 0x3c, 0x69, 0x6a, 0x3f, 0x3f, 0x6a, 0x69, 0x3c, 0x66, 0x33, 0x30, 0x65,
+       0x66, 0x33, 0x30, 0x65, 0x3f, 0x6a, 0x69, 0x3c, 0x3c, 0x69, 0x6a, 0x3f, 0x65, 0x30, 0x33, 0x66,
+       0x03, 0x56, 0x55, 0x00, 0x5a, 0x0f, 0x0c, 0x59, 0x59, 0x0c, 0x0f, 0x5a, 0x00, 0x55, 0x56, 0x03,
+       0x69, 0x3c, 0x3f, 0x6a, 0x30, 0x65, 0x66, 0x33, 0x33, 0x66, 0x65, 0x30, 0x6a, 0x3f, 0x3c, 0x69,
+       0x0c, 0x59, 0x5a, 0x0f, 0x55, 0x00, 0x03, 0x56, 0x56, 0x03, 0x00, 0x55, 0x0f, 0x5a, 0x59, 0x0c,
+       0x0f, 0x5a, 0x59, 0x0c, 0x56, 0x03, 0x00, 0x55, 0x55, 0x00, 0x03, 0x56, 0x0c, 0x59, 0x5a, 0x0f,
+       0x6a, 0x3f, 0x3c, 0x69, 0x33, 0x66, 0x65, 0x30, 0x30, 0x65, 0x66, 0x33, 0x69, 0x3c, 0x3f, 0x6a,
+       0x6a, 0x3f, 0x3c, 0x69, 0x33, 0x66, 0x65, 0x30, 0x30, 0x65, 0x66, 0x33, 0x69, 0x3c, 0x3f, 0x6a,
+       0x0f, 0x5a, 0x59, 0x0c, 0x56, 0x03, 0x00, 0x55, 0x55, 0x00, 0x03, 0x56, 0x0c, 0x59, 0x5a, 0x0f,
+       0x0c, 0x59, 0x5a, 0x0f, 0x55, 0x00, 0x03, 0x56, 0x56, 0x03, 0x00, 0x55, 0x0f, 0x5a, 0x59, 0x0c,
+       0x69, 0x3c, 0x3f, 0x6a, 0x30, 0x65, 0x66, 0x33, 0x33, 0x66, 0x65, 0x30, 0x6a, 0x3f, 0x3c, 0x69,
+       0x03, 0x56, 0x55, 0x00, 0x5a, 0x0f, 0x0c, 0x59, 0x59, 0x0c, 0x0f, 0x5a, 0x00, 0x55, 0x56, 0x03,
+       0x66, 0x33, 0x30, 0x65, 0x3f, 0x6a, 0x69, 0x3c, 0x3c, 0x69, 0x6a, 0x3f, 0x65, 0x30, 0x33, 0x66,
+       0x65, 0x30, 0x33, 0x66, 0x3c, 0x69, 0x6a, 0x3f, 0x3f, 0x6a, 0x69, 0x3c, 0x66, 0x33, 0x30, 0x65,
+       0x00, 0x55, 0x56, 0x03, 0x59, 0x0c, 0x0f, 0x5a, 0x5a, 0x0f, 0x0c, 0x59, 0x03, 0x56, 0x55, 0x00
+};
+
+/*
+ * nand_calculate_ecc - Calculate 3-byte ECC for 256-byte block
+ */
+int nand_calculate_ecc(struct nand_device_s *device, const u8 *dat, u8 *ecc_code)
+{
+       u8 idx, reg1, reg2, reg3, tmp1, tmp2;
+       int i;
+
+       /* Initialize variables */
+       reg1 = reg2 = reg3 = 0;
+
+       /* Build up column parity */
+       for(i = 0; i < 256; i++) {
+               /* Get CP0 - CP5 from table */
+               idx = nand_ecc_precalc_table[*dat++];
+               reg1 ^= (idx & 0x3f);
+
+               /* All bit XOR = 1 ? */
+               if (idx & 0x40) {
+                       reg3 ^= (u8) i;
+                       reg2 ^= ~((u8) i);
+               }
+       }
+
+       /* Create non-inverted ECC code from line parity */
+       tmp1  = (reg3 & 0x80) >> 0; /* B7 -> B7 */
+       tmp1 |= (reg2 & 0x80) >> 1; /* B7 -> B6 */
+       tmp1 |= (reg3 & 0x40) >> 1; /* B6 -> B5 */
+       tmp1 |= (reg2 & 0x40) >> 2; /* B6 -> B4 */
+       tmp1 |= (reg3 & 0x20) >> 2; /* B5 -> B3 */
+       tmp1 |= (reg2 & 0x20) >> 3; /* B5 -> B2 */
+       tmp1 |= (reg3 & 0x10) >> 3; /* B4 -> B1 */
+       tmp1 |= (reg2 & 0x10) >> 4; /* B4 -> B0 */
+
+       tmp2  = (reg3 & 0x08) << 4; /* B3 -> B7 */
+       tmp2 |= (reg2 & 0x08) << 3; /* B3 -> B6 */
+       tmp2 |= (reg3 & 0x04) << 3; /* B2 -> B5 */
+       tmp2 |= (reg2 & 0x04) << 2; /* B2 -> B4 */
+       tmp2 |= (reg3 & 0x02) << 2; /* B1 -> B3 */
+       tmp2 |= (reg2 & 0x02) << 1; /* B1 -> B2 */
+       tmp2 |= (reg3 & 0x01) << 1; /* B0 -> B1 */
+       tmp2 |= (reg2 & 0x01) << 0; /* B7 -> B0 */
+
+       /* Calculate final ECC code */
+#ifdef NAND_ECC_SMC
+       ecc_code[0] = ~tmp2;
+       ecc_code[1] = ~tmp1;
+#else
+       ecc_code[0] = ~tmp1;
+       ecc_code[1] = ~tmp2;
+#endif
+       ecc_code[2] = ((~reg1) << 2) | 0x03;
+
+       return 0;
+}

diff --git a/src/target/board/olimex_stm32_h103.cfg b/src/target/board/olimex_stm32_h103.cfg
index 713a13afd1c2b83515efc1fb5a9df56683075ab2..028c3b6dbf33f7aaee63ef601ffe163670e1e8c6 100644 (file)
--- a/src/target/board/olimex_stm32_h103.cfg
+++ b/src/target/board/olimex_stm32_h103.cfg
@@ -1,9 +1,9 @@
-#\r
-# Olimex STM32-H103 eval board\r
-#\r
-# http://olimex.com/dev/stm32-h103.html\r
-#\r
-\r
-source [find target/stm32.cfg]\r
-\r
-set _BSTAPID 0x16410041\r
+#
+# Olimex STM32-H103 eval board
+#
+# http://olimex.com/dev/stm32-h103.html
+#
+
+source [find target/stm32.cfg]
+
+set _BSTAPID 0x16410041

diff --git a/src/target/interface/oocdlink.cfg b/src/target/interface/oocdlink.cfg
index 620e3743fe84cdf962123696a059fd619d38d91f..8ef8dbfad5add01585ff77ea58127e52e214497e 100644 (file)
--- a/src/target/interface/oocdlink.cfg
+++ b/src/target/interface/oocdlink.cfg
@@ -1,12 +1,12 @@
-#\r
-# Joern Kaipf's OOCDLink\r
-#\r
-# http://www.joernonline.de/contrexx2/cms/index.php?page=126\r
-#\r
-\r
-interface ft2232\r
-ft2232_device_desc "OOCDLink A"\r
-ft2232_layout oocdlink\r
-ft2232_vid_pid 0x0403 0xbaf8\r
-jtag_khz 5\r
-\r
+#
+# Joern Kaipf's OOCDLink
+#
+# http://www.joernonline.de/contrexx2/cms/index.php?page=126
+#
+
+interface ft2232
+ft2232_device_desc "OOCDLink A"
+ft2232_layout oocdlink
+ft2232_vid_pid 0x0403 0xbaf8
+jtag_khz 5
+

diff --git a/src/target/target/lpc2103.cfg b/src/target/target/lpc2103.cfg
index 808ae2643ba78a391cba092e23a6b08e46a4df0c..0e03c51f91665dd10a0420ad9162ed84ff91d22c 100644 (file)
--- a/src/target/target/lpc2103.cfg
+++ b/src/target/target/lpc2103.cfg
@@ -1,35 +1,35 @@
-# NXP LPC2103 ARM7TDMI-S with 32kB Flash and 8kB SRAM, clocked with 12MHz crystal\r
-\r
-if { [info exists CHIPNAME] } {        \r
-   set _CHIPNAME $CHIPNAME\r
-} else {\r
-   set _CHIPNAME lpc2103\r
-}\r
-\r
-if { [info exists ENDIAN] } {\r
-   set _ENDIAN $ENDIAN\r
-} else {\r
-   set _ENDIAN little\r
-}\r
-\r
-if { [info exists CPUTAPID ] } {\r
-   set _CPUTAPID $CPUTAPID\r
-} else {\r
-   set _CPUTAPID 0x4f1f0f0f \r
-}\r
-\r
-# LPC2000 -> SRST causes TRST\r
-reset_config trst_and_srst srst_pulls_trst\r
-\r
-jtag newtap $_CHIPNAME cpu -irlen 4 -ircapture 0x1 -irmask 0xf -expected-id $_CPUTAPID\r
-\r
-set _TARGETNAME [format "%s.cpu" $_CHIPNAME]\r
-\r
-target create $_TARGETNAME arm7tdmi -endian $_ENDIAN -chain-position $_TARGETNAME -variant arm7tdmi-s_r4\r
-\r
-# 8kB of internal SRAM\r
-$_TARGETNAME configure -work-area-virt 0 -work-area-phys 0x40000000 -work-area-size 0x2000 -work-area-backup 0\r
-\r
-# 32kB of internal Flash, core clocked with 12MHz crystal\r
-# flash bank lpc2000 <base> <size> 0 0 <target#> <variant> <clock> [calc_checksum]\r
-flash bank lpc2000 0x0 0x8000 0 0 0 lpc2000_v2 12000 calc_checksum\r
+# NXP LPC2103 ARM7TDMI-S with 32kB Flash and 8kB SRAM, clocked with 12MHz crystal
+
+if { [info exists CHIPNAME] } {        
+   set _CHIPNAME $CHIPNAME
+} else {
+   set _CHIPNAME lpc2103
+}
+
+if { [info exists ENDIAN] } {
+   set _ENDIAN $ENDIAN
+} else {
+   set _ENDIAN little
+}
+
+if { [info exists CPUTAPID ] } {
+   set _CPUTAPID $CPUTAPID
+} else {
+   set _CPUTAPID 0x4f1f0f0f 
+}
+
+# LPC2000 -> SRST causes TRST
+reset_config trst_and_srst srst_pulls_trst
+
+jtag newtap $_CHIPNAME cpu -irlen 4 -ircapture 0x1 -irmask 0xf -expected-id $_CPUTAPID
+
+set _TARGETNAME [format "%s.cpu" $_CHIPNAME]
+
+target create $_TARGETNAME arm7tdmi -endian $_ENDIAN -chain-position $_TARGETNAME -variant arm7tdmi-s_r4
+
+# 8kB of internal SRAM
+$_TARGETNAME configure -work-area-virt 0 -work-area-phys 0x40000000 -work-area-size 0x2000 -work-area-backup 0
+
+# 32kB of internal Flash, core clocked with 12MHz crystal
+# flash bank lpc2000 <base> <size> 0 0 <target#> <variant> <clock> [calc_checksum]
+flash bank lpc2000 0x0 0x8000 0 0 0 lpc2000_v2 12000 calc_checksum