Freddie Chopin <freddie_chopin@op.pl> I attach a config file for LPC2103

git-svn-id: svn://svn.berlios.de/openocd/trunk@1449 b42882b7-edfa-0310-969c-e2dbd0fdcd60

diff --git a/src/target/target/lpc2103.cfg b/src/target/target/lpc2103.cfg
new file mode 100644 (file)
index 0000000..808ae26
--- /dev/null
+++ b/src/target/target/lpc2103.cfg
@@ -0,0 +1,35 @@
+# NXP LPC2103 ARM7TDMI-S with 32kB Flash and 8kB SRAM, clocked with 12MHz crystal\r
+\r
+if { [info exists CHIPNAME] } {        \r
+   set _CHIPNAME $CHIPNAME\r
+} else {\r
+   set _CHIPNAME lpc2103\r
+}\r
+\r
+if { [info exists ENDIAN] } {\r
+   set _ENDIAN $ENDIAN\r
+} else {\r
+   set _ENDIAN little\r
+}\r
+\r
+if { [info exists CPUTAPID ] } {\r
+   set _CPUTAPID $CPUTAPID\r
+} else {\r
+   set _CPUTAPID 0x4f1f0f0f \r
+}\r
+\r
+# LPC2000 -> SRST causes TRST\r
+reset_config trst_and_srst srst_pulls_trst\r
+\r
+jtag newtap $_CHIPNAME cpu -irlen 4 -ircapture 0x1 -irmask 0xf -expected-id $_CPUTAPID\r
+\r
+set _TARGETNAME [format "%s.cpu" $_CHIPNAME]\r
+\r
+target create $_TARGETNAME arm7tdmi -endian $_ENDIAN -chain-position $_TARGETNAME -variant arm7tdmi-s_r4\r
+\r
+# 8kB of internal SRAM\r
+$_TARGETNAME configure -work-area-virt 0 -work-area-phys 0x40000000 -work-area-size 0x2000 -work-area-backup 0\r
+\r
+# 32kB of internal Flash, core clocked with 12MHz crystal\r
+# flash bank lpc2000 <base> <size> 0 0 <target#> <variant> <clock> [calc_checksum]\r
+flash bank lpc2000 0x0 0x8000 0 0 0 lpc2000_v2 12000 calc_checksum\r