armv7m: fix broken stlink build
authorSpencer Oliver <spen@spen-soft.co.uk>
Fri, 30 Mar 2012 19:34:24 +0000 (20:34 +0100)
committerSpencer Oliver <spen@spen-soft.co.uk>
Fri, 30 Mar 2012 20:13:00 +0000 (20:13 +0000)
The stlink partially supports the cortex-m4 fp regs and requires these
defines to build.

Change-Id: Id3aa802ecc7006cb6d9f84b79ab3c21af24c1001
Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-on: http://openocd.zylin.com/545
Tested-by: jenkins
src/target/armv7m.h

index 827a87993846bdf65fe2a9993fa8c24c36f211a4..6002b571fc10a6af0a05f472be4d6be95eca3ed6 100644 (file)
@@ -62,7 +62,7 @@ char *armv7m_exception_string(int number);
 /* offsets into armv7m core register cache */
 enum {
        /* for convenience, the first set of indices match
-        * the Cortex-M3 DCRSR selectors
+        * the Cortex-M3/-M4 DCRSR selectors
         */
        ARMV7M_R0,
        ARMV7M_R1,
@@ -94,6 +94,63 @@ enum {
        ARMV7M_FAULTMASK,
        ARMV7M_CONTROL,
 
+       /* 32bit Floating-point registers */
+       ARMV7M_S0,
+       ARMV7M_S1,
+       ARMV7M_S2,
+       ARMV7M_S3,
+       ARMV7M_S4,
+       ARMV7M_S5,
+       ARMV7M_S6,
+       ARMV7M_S7,
+       ARMV7M_S8,
+       ARMV7M_S9,
+       ARMV7M_S10,
+       ARMV7M_S11,
+       ARMV7M_S12,
+       ARMV7M_S13,
+       ARMV7M_S14,
+       ARMV7M_S15,
+       ARMV7M_S16,
+       ARMV7M_S17,
+       ARMV7M_S18,
+       ARMV7M_S19,
+       ARMV7M_S20,
+       ARMV7M_S21,
+       ARMV7M_S22,
+       ARMV7M_S23,
+       ARMV7M_S24,
+       ARMV7M_S25,
+       ARMV7M_S26,
+       ARMV7M_S27,
+       ARMV7M_S28,
+       ARMV7M_S29,
+       ARMV7M_S30,
+       ARMV7M_S31,
+
+       /* 64bit Floating-point registers */
+       ARMV7M_D0,
+       ARMV7M_D1,
+       ARMV7M_D2,
+       ARMV7M_D3,
+       ARMV7M_D4,
+       ARMV7M_D5,
+       ARMV7M_D6,
+       ARMV7M_D7,
+       ARMV7M_D8,
+       ARMV7M_D9,
+       ARMV7M_D10,
+       ARMV7M_D11,
+       ARMV7M_D12,
+       ARMV7M_D13,
+       ARMV7M_D14,
+       ARMV7M_D15,
+
+       /* Floating-point status registers */
+       ARMV7M_FPSID,
+       ARMV7M_FPSCR,
+       ARMV7M_FPEXC,
+
        ARMV7M_LAST_REG,
 };