BUILD_TARGET64 creates a larger test matrix and mostly gates the
building of the aarch64/armv8 target, make that unconditional, which
would help fixing any issues with 64-bit address types anyway.
Rebased by Antonio Borneo after commit
1fbe8450a9dd ("mips: Add
MIPS64 support")
Change-Id: I219f62b744d540d9dde9a42e6b63fd7d91df3dbb
Suggested-by: Matthias Welwarsky <matthias@welwarsky.de>
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/5240
Tested-by: jenkins
[Disable building internal libjaylink]),
[use_internal_libjaylink=$enableval], [use_internal_libjaylink=yes])
-AC_ARG_ENABLE([target64],
- AS_HELP_STRING([--disable-target64], [Disable 64-bit target address]),
- [build_target64=$enableval], [build_target64=yes])
-
build_minidriver=no
AC_MSG_CHECKING([whether to enable ZY1000 minidriver])
AS_IF([test "x$build_zy1000" = "xyes"], [
AC_DEFINE([BUILD_XLNX_PCIE_XVC], [0], [0 if you don't want Xilinx XVC/PCIe driver.])
])
-AS_IF([test "x$build_target64" = "xyes"], [
- AC_DEFINE([BUILD_TARGET64], [1], [1 if you want 64-bit addresses.])
-], [
- AC_DEFINE([BUILD_TARGET64], [0], [0 if you don't want 64-bit addresses.])
-])
-
-
PKG_CHECK_MODULES([LIBUSB1], [libusb-1.0], [
use_libusb1=yes
AC_DEFINE([HAVE_LIBUSB1], [1], [Define if you have libusb-1.x])
AM_CONDITIONAL([USE_LIBFTDI], [test "x$use_libftdi" = "xyes"])
AM_CONDITIONAL([USE_HIDAPI], [test "x$use_hidapi" = "xyes"])
AM_CONDITIONAL([USE_LIBJAYLINK], [test "x$use_libjaylink" = "xyes"])
-AM_CONDITIONAL([TARGET64], [test "x$build_target64" = "xyes"])
AM_CONDITIONAL([RSHIM], [test "x$build_rshim" = "xyes"])
AM_CONDITIONAL([MINIDRIVER], [test "x$build_minidriver" = "xyes"])
#endif
-#if BUILD_TARGET64
typedef uint64_t target_addr_t;
#define TARGET_ADDR_MAX UINT64_MAX
#define TARGET_PRIdADDR PRId64
#define TARGET_PRIoADDR PRIo64
#define TARGET_PRIxADDR PRIx64
#define TARGET_PRIXADDR PRIX64
-#else
-typedef uint32_t target_addr_t;
-#define TARGET_ADDR_MAX UINT32_MAX
-#define TARGET_PRIdADDR PRId32
-#define TARGET_PRIuADDR PRIu32
-#define TARGET_PRIoADDR PRIo32
-#define TARGET_PRIxADDR PRIx32
-#define TARGET_PRIXADDR PRIX32
-#endif
#define TARGET_ADDR_FMT "0x%8.8" TARGET_PRIxADDR
#endif /* OPENOCD_HELPER_TYPES_H */
%D%/dsp563xx.c \
%D%/dsp563xx_once.c \
%D%/dsp5680xx.c \
- %D%/hla_target.c
-
-if TARGET64
-%C%_libtarget_la_SOURCES +=$(ARMV8_SRC)
-%C%_libtarget_la_SOURCES +=$(MIPS64_SRC)
-endif
+ %D%/hla_target.c \
+ $(ARMV8_SRC) \
+ $(MIPS64_SRC)
TARGET_CORE_SRC = \
%D%/algorithm.c \
/* decode memory attribute */
SS = (value >> 1) & 1;
-#if !BUILD_TARGET64
- if (SS) {
- LOG_ERROR("Super section found with no-64 bit address support");
- return ERROR_FAIL;
- }
-#endif
NOS = (value >> 10) & 1; /* Not Outer shareable */
NS = (value >> 9) & 1; /* Non secure */
INNER = (value >> 4) & 0x7;
#include "config.h"
#endif
-#if BUILD_TARGET64 == 1
-
#include "mips64.h"
static const struct {
return ERROR_OK;
}
-
-#endif /* BUILD_TARGET64 */
#include "config.h"
#endif
-#if BUILD_TARGET64 == 1
-
#include "mips64.h"
#include "mips64_pracc.h"
return retval;
}
-
-#endif /* BUILD_TARGET64 */
#include "mips32.h"
#include "mips_ejtag.h"
#include "mips32_dmaacc.h"
-
-#if BUILD_TARGET64 == 1
#include "mips64.h"
#include "mips64_pracc.h"
-#endif
void mips_ejtag_set_instr(struct mips_ejtag *ejtag_info, uint32_t new_instr)
{
return ERROR_OK;
}
-#if BUILD_TARGET64 == 1
-
int mips64_ejtag_config_step(struct mips_ejtag *ejtag_info, bool enable_step)
{
const uint32_t code_enable[] = {
return ERROR_OK;
}
-
-#endif /* BUILD_TARGET64 */
#include "config.h"
#endif
-#if BUILD_TARGET64 == 1
-
#include "breakpoints.h"
#include "mips32.h"
#include "mips64.h"
.commands = mips64_commands_handlers,
};
-
-#endif /* BUILD_TARGET64 */
target_addr_t address = 0;
uint32_t v;
if (sbasize > 32) {
-#if BUILD_TARGET64
dmi_read(target, &v, DMI_SBADDRESS1);
address |= v;
address <<= 32;
-#endif
}
dmi_read(target, &v, DMI_SBADDRESS0);
address |= v;
if (sbasize > 64)
dmi_write(target, DMI_SBADDRESS2, 0);
if (sbasize > 32)
-#if BUILD_TARGET64
dmi_write(target, DMI_SBADDRESS1, address >> 32);
-#else
- dmi_write(target, DMI_SBADDRESS1, 0);
-#endif
return dmi_write(target, DMI_SBADDRESS0, address);
}
&mem_ap_target,
&esirisc_target,
&arcv2_target,
-#if BUILD_TARGET64
&aarch64_target,
&mips_mips64_target,
-#endif
NULL,
};