--- /dev/null
+ # grab the input values and convert to 1/100 mil
+ # how much to grow the pads by for soldermask [1/100 mil]
+ # clearance from planes [1/100 mil]
+ # silk screen width [1/100 mil]
+ # courtyard silk screen width [1/100 mil]
+# element_flags, description, pcb-name, value, mark_x, mark_y,
+# text_x, text_y, text_direction, text_scale, text_flags
+Element[0x00000000 "Standard SMT resistor, capacitor etc" "" "0603" 0 0 -3150 -3150 0 100 ""]
+(
+#
+# Pad[x1, y1, x2, y2, thickness, clearance, mask, name , pad number, flags]
+ Pad[-2559 -492
+ -2559 492
+ 2952 2000 3552 "1" "1" "square"]
+ Pad[2559 -492
+ 2559 492
+ 2952 2000 3552 "2" "2" "square"]
+
+# ElementLine[ -4300 -2300 -4300 2300 1000 ]
+# ElementLine[ -4300 2300 4500 2300 1000 ]
+# ElementLine[ 4500 2300 4500 -2300 1000 ]
+# ElementLine[ 4500 -2300 -4300 -2300 1000 ]
+ ElementLine[ 4700 2500 4700 -2500 1000 ]
+ ElementLine[ 4700 2500 3700 2500 1000 ]
+ ElementLine[ 4700 -2500 3700 -2500 1000 ]
+
+#
+# This draws a 1 mil placement courtyard outline in silk. It should probably
+# not be included since you wont want to try and fab a 1 mil silk line. Then
+# again, it is most useful during parts placement. It really is time for some
+# additional non-fab layers...
+# ElementLine[eval(-1*V1/2) eval(-1*V2/2) eval(-1*V1/2) eval( V2/2) CYW]
+# ElementLine[eval(-1*V1/2) eval(-1*V2/2) eval( V1/2) eval(-1*V2/2) CYW]
+# ElementLine[eval( V1/2) eval( V2/2) eval( V1/2) eval(-1*V2/2) CYW]
+# ElementLine[eval( V1/2) eval( V2/2) eval(-1*V1/2) eval( V2/2) CYW]
+)
--- /dev/null
+# USB Cable, Molex 0887283400
+Element[0x00000000 "USB Cable" "J0" "" 0 0 125 -30 0 100 0x00000000]
+(
+# Pin args: X Y Thickness Clearance Mask DrillHole
+ Pin[ 0 0 6250 3000 6850 3800 "1" "1" 0x04000101]
+ Pin[ 7500 0 6250 3000 6850 3800 "2" "2" 0x04000001]
+ Pin[15000 0 6250 3000 6850 3800 "3" "3" 0x04000001]
+ Pin[22500 0 6250 3000 6850 3800 "4" "4" 0x04000001]
+ Pin[31500 0 8700 3000 9300 6250 "5" "5" 0x04000001]
+)