Merge branch 'master' of https://github.com/burnsfisher/stlink

diff --combined src/stlink-common.c
index ed1583d5a5291c0e6f6fc012aa76dcb60bedcd9f,2b208bc549f81a1cdbcdfb27c7e31696c557c575..23bea5836299299c7444e658017bf7900f63bf8d
--- 1/src/stlink-common.c
--- 2/src/stlink-common.c
+++ b/src/stlink-common.c
@@@ -143,8 -143,7 +143,8 @@@ static inline uint32_t read_flash_obr(s
  
  static inline uint32_t read_flash_cr(stlink_t *sl) {
      uint32_t res;
 -    if ((sl->chip_id == STM32_CHIPID_F2) || (sl->chip_id == STM32_CHIPID_F4))
 +    if ((sl->chip_id == STM32_CHIPID_F2) || (sl->chip_id == STM32_CHIPID_F4) ||
 +        (sl->chip_id == STM32_CHIPID_F4_LP))
          res = stlink_read_debug32(sl, FLASH_F4_CR);
      else
          res = stlink_read_debug32(sl, FLASH_CR);
@@@ -156,8 -155,7 +156,8 @@@
  
  static inline unsigned int is_flash_locked(stlink_t *sl) {
      /* return non zero for true */
 -    if ((sl->chip_id == STM32_CHIPID_F2) || (sl->chip_id == STM32_CHIPID_F4))
 +    if ((sl->chip_id == STM32_CHIPID_F2) || (sl->chip_id == STM32_CHIPID_F4) ||
 +        (sl->chip_id == STM32_CHIPID_F4_LP))
          return read_flash_cr(sl) & (1 << FLASH_F4_CR_LOCK);
      else
          return read_flash_cr(sl) & (1 << FLASH_CR_LOCK);
@@@ -169,8 -167,7 +169,8 @@@ static void unlock_flash(stlink_t *sl) 
         an invalid sequence results in a definitive lock of
         the FPEC block until next reset.
       */
 -    if ((sl->chip_id == STM32_CHIPID_F2) || (sl->chip_id == STM32_CHIPID_F4)) {
 +    if ((sl->chip_id == STM32_CHIPID_F2) || (sl->chip_id == STM32_CHIPID_F4) ||
 +        (sl->chip_id == STM32_CHIPID_F4_LP)) {
        stlink_write_debug32(sl, FLASH_F4_KEYR, FLASH_KEY1);
          stlink_write_debug32(sl, FLASH_F4_KEYR, FLASH_KEY2);
      } else {
@@@ -195,8 -192,7 +195,8 @@@ static int unlock_flash_if(stlink_t *sl
  }
  
  static void lock_flash(stlink_t *sl) {
 -    if ((sl->chip_id == STM32_CHIPID_F2) || (sl->chip_id == STM32_CHIPID_F4)) {
 +    if ((sl->chip_id == STM32_CHIPID_F2) || (sl->chip_id == STM32_CHIPID_F4) ||
 +        (sl->chip_id == STM32_CHIPID_F4_LP)) {
        const uint32_t n = read_flash_cr(sl) | (1 << FLASH_F4_CR_LOCK);
        stlink_write_debug32(sl, FLASH_F4_CR, n);
      } else {
@@@ -208,8 -204,7 +208,8 @@@
  
  
  static void set_flash_cr_pg(stlink_t *sl) {
 -    if ((sl->chip_id == STM32_CHIPID_F2) || (sl->chip_id == STM32_CHIPID_F4)) {
 +    if ((sl->chip_id == STM32_CHIPID_F2) || (sl->chip_id == STM32_CHIPID_F4) ||
 +        (sl->chip_id == STM32_CHIPID_F4_LP)) {
                uint32_t x = read_flash_cr(sl);
                x |= (1 << FLASH_CR_PG);
        stlink_write_debug32(sl, FLASH_F4_CR, x);
@@@ -221,8 -216,7 +221,8 @@@
  
  static void __attribute__((unused)) clear_flash_cr_pg(stlink_t *sl) {
      const uint32_t n = read_flash_cr(sl) & ~(1 << FLASH_CR_PG);
 -    if ((sl->chip_id == STM32_CHIPID_F2) || (sl->chip_id == STM32_CHIPID_F4))
 +    if ((sl->chip_id == STM32_CHIPID_F2) || (sl->chip_id == STM32_CHIPID_F4) ||
 +        (sl->chip_id == STM32_CHIPID_F4_LP))
        stlink_write_debug32(sl, FLASH_F4_CR, n);
      else
          stlink_write_debug32(sl, FLASH_CR, n);
@@@ -239,8 -233,7 +239,8 @@@ static void __attribute__((unused)) cle
  }
  
  static void set_flash_cr_mer(stlink_t *sl) {
 -    if ((sl->chip_id == STM32_CHIPID_F2) || (sl->chip_id == STM32_CHIPID_F4))
 +    if ((sl->chip_id == STM32_CHIPID_F2) || (sl->chip_id == STM32_CHIPID_F4) ||
 +        (sl->chip_id == STM32_CHIPID_F4_LP))
          stlink_write_debug32(sl, FLASH_F4_CR,
                               stlink_read_debug32(sl, FLASH_F4_CR) | (1 << FLASH_CR_MER));
      else
@@@ -249,8 -242,7 +249,8 @@@
  }
  
  static void __attribute__((unused)) clear_flash_cr_mer(stlink_t *sl) {
 -    if ((sl->chip_id == STM32_CHIPID_F2) || (sl->chip_id == STM32_CHIPID_F4))
 +    if ((sl->chip_id == STM32_CHIPID_F2) || (sl->chip_id == STM32_CHIPID_F4) ||
 +        (sl->chip_id == STM32_CHIPID_F4_LP))
          stlink_write_debug32(sl, FLASH_F4_CR,
                               stlink_read_debug32(sl, FLASH_F4_CR) & ~(1 << FLASH_CR_MER));
      else
@@@ -259,8 -251,7 +259,8 @@@
  }
  
  static void set_flash_cr_strt(stlink_t *sl) {
 -    if ((sl->chip_id == STM32_CHIPID_F2) || (sl->chip_id == STM32_CHIPID_F4)) {
 +    if ((sl->chip_id == STM32_CHIPID_F2) || (sl->chip_id == STM32_CHIPID_F4) ||
 +        (sl->chip_id == STM32_CHIPID_F4_LP)) {
          uint32_t x = read_flash_cr(sl);
          x |= (1 << FLASH_F4_CR_STRT);
          stlink_write_debug32(sl, FLASH_F4_CR, x);
@@@ -276,8 -267,7 +276,8 @@@ static inline uint32_t read_flash_acr(s
  
  static inline uint32_t read_flash_sr(stlink_t *sl) {
      uint32_t res;
 -    if ((sl->chip_id == STM32_CHIPID_F2) || (sl->chip_id == STM32_CHIPID_F4))
 +    if ((sl->chip_id == STM32_CHIPID_F2) || (sl->chip_id == STM32_CHIPID_F4) ||
 +        (sl->chip_id == STM32_CHIPID_F4_LP))
          res = stlink_read_debug32(sl, FLASH_F4_SR);
      else
          res = stlink_read_debug32(sl, FLASH_SR);
@@@ -286,8 -276,7 +286,8 @@@
  }
  
  static inline unsigned int is_flash_busy(stlink_t *sl) {
 -    if ((sl->chip_id == STM32_CHIPID_F2) || (sl->chip_id == STM32_CHIPID_F4))
 +    if ((sl->chip_id == STM32_CHIPID_F2) || (sl->chip_id == STM32_CHIPID_F4) ||
 +        (sl->chip_id == STM32_CHIPID_F4_LP))
          return read_flash_sr(sl) & (1 << FLASH_F4_SR_BSY);
      else
          return read_flash_sr(sl) & (1 << FLASH_SR_BSY);
@@@ -461,10 -450,9 +461,10 @@@ int stlink_load_device_params(stlink_t 
      // read flash size from hardware, if possible...
      if (sl->chip_id == STM32_CHIPID_F2) {
          sl->flash_size = 0x100000; /* Use maximum, User must care!*/
 -    } else if (sl->chip_id == STM32_CHIPID_F4) {
 +    } else if (sl->chip_id == STM32_CHIPID_F4 ||
 +        sl->chip_id == STM32_CHIPID_F4_LP) {
                sl->flash_size = 0x100000;                      //todo: RM0090 error; size register same address as unique ID
-     } else if (sl->chip_id == STM32_CHIPID_L1_MEDIUM) {
+     } else if (sl->chip_id == STM32_CHIPID_L1_MEDIUM || sl->chip_id == STM32_CHIPID_L1_MEDIUM_PLUS) {
          // if the flash size is zero, we assume it is 128k, if not we calculate the real value
          uint32_t flash_size = stlink_read_debug32(sl,params->flash_size_reg) & 0xffff;
          if ( flash_size == 0 ) {
@@@ -472,7 -460,7 +472,7 @@@
          } else {
              sl->flash_size = flash_size * 1024;
          }
-     } else if ((sl->chip_id & 0xFFF) == STM32_CHIPID_L1_MEDIUM_PLUS) {
+     } else if ((sl->chip_id & 0xFFF) == STM32_CHIPID_L1_HIGH) {
          uint32_t flash_size = stlink_read_debug32(sl, params->flash_size_reg) & 0x1;
          // 0 is 384k and 1 is 256k
          if ( flash_size == 0 ) {
@@@ -923,7 -911,8 +923,8 @@@ int stlink_fread(stlink_t* sl, const ch
      int error = -1;
      size_t off;
      int num_empty = 0;
-     unsigned char erased_pattern = (sl->chip_id == STM32_CHIPID_L1_MEDIUM  || sl->chip_id == STM32_CHIPID_L1_MEDIUM_PLUS)?0:0xff;
+     unsigned char erased_pattern = (sl->chip_id == STM32_CHIPID_L1_MEDIUM  || sl->chip_id == STM32_CHIPID_L1_MEDIUM_PLUS
+                                      || sl->chip_id == STM32_CHIPID_L1_HIGH) ? 0:0xff;
  
      const int fd = open(path, O_RDWR | O_TRUNC | O_CREAT, 00700);
      if (fd == -1) {
@@@ -1005,8 -994,7 +1006,8 @@@ uint32_t calculate_F4_sectornum(uint32_
  }
  
  uint32_t stlink_calculate_pagesize(stlink_t *sl, uint32_t flashaddr){
 -      if ((sl->chip_id == STM32_CHIPID_F2) || (sl->chip_id == STM32_CHIPID_F4)) {
 +      if ((sl->chip_id == STM32_CHIPID_F2) || (sl->chip_id == STM32_CHIPID_F4) ||
 +      (sl->chip_id == STM32_CHIPID_F4_LP)) {
                uint32_t sector=calculate_F4_sectornum(flashaddr);
                if (sector<4) sl->flash_pgsz=0x4000;
                else if(sector<5) sl->flash_pgsz=0x10000;
@@@ -1023,8 -1011,7 +1024,8 @@@
   */
  int stlink_erase_flash_page(stlink_t *sl, stm32_addr_t flashaddr)
  {
 -  if ((sl->chip_id == STM32_CHIPID_F2) || (sl->chip_id == STM32_CHIPID_F4)) {
 +  if ((sl->chip_id == STM32_CHIPID_F2) || (sl->chip_id == STM32_CHIPID_F4) ||
 +      (sl->chip_id == STM32_CHIPID_F4_LP)) {
      /* wait for ongoing op to finish */
      wait_flash_busy(sl);
  
@@@ -1050,7 -1037,8 +1051,8 @@@
  #if DEBUG_FLASH
        fprintf(stdout, "Erase Final CR:0x%x\n", read_flash_cr(sl));
  #endif
-   } else if (sl->chip_id == STM32_CHIPID_L1_MEDIUM || sl->chip_id == STM32_CHIPID_L1_MEDIUM_PLUS) {
+   } else if (sl->chip_id == STM32_CHIPID_L1_MEDIUM || sl->chip_id == STM32_CHIPID_L1_MEDIUM_PLUS
+               || sl->chip_id == STM32_CHIPID_L1_HIGH) {
  
      uint32_t val;
  
@@@ -1159,7 -1147,8 +1161,8 @@@
  }
  
  int stlink_erase_flash_mass(stlink_t *sl) {
-     if (sl->chip_id == STM32_CHIPID_L1_MEDIUM || sl->chip_id == STM32_CHIPID_L1_MEDIUM_PLUS ) {
+     if (sl->chip_id == STM32_CHIPID_L1_MEDIUM || sl->chip_id == STM32_CHIPID_L1_MEDIUM_PLUS 
+       || sl->chip_id == STM32_CHIPID_L1_HIGH) {
          /* erase each page */
          int i = 0, num_pages = sl->flash_size/sl->flash_pgsz;
          for (i = 0; i < num_pages; i++) {
@@@ -1329,14 -1318,14 +1332,15 @@@ int write_loader_to_sram(stlink_t *sl, 
      const uint8_t* loader_code;
      size_t loader_size;
  
-     if (sl->chip_id == STM32_CHIPID_L1_MEDIUM || sl->chip_id == STM32_CHIPID_L1_MEDIUM_PLUS ) { /* stm32l */
+     if (sl->chip_id == STM32_CHIPID_L1_MEDIUM || sl->chip_id == STM32_CHIPID_L1_MEDIUM_PLUS
+               || sl->chip_id == STM32_CHIPID_L1_HIGH ) { /* stm32l */
          loader_code = loader_code_stm32l;
          loader_size = sizeof(loader_code_stm32l);
      } else if (sl->core_id == STM32VL_CORE_ID || sl->chip_id == STM32_CHIPID_F3  || sl->chip_id == STM32_CHIPID_F37x) {
          loader_code = loader_code_stm32vl;
          loader_size = sizeof(loader_code_stm32vl);
 -    } else if (sl->chip_id == STM32_CHIPID_F2 || sl->chip_id == STM32_CHIPID_F4) {
 +    } else if (sl->chip_id == STM32_CHIPID_F2 ||
 +        sl->chip_id == STM32_CHIPID_F4 || sl->chip_id == STM32_CHIPID_F4_LP) {
          loader_code = loader_code_stm32f4;
          loader_size = sizeof(loader_code_stm32f4);
      } else if (sl->chip_id == STM32_CHIPID_F0 || sl->chip_id == STM32_CHIPID_F0_SMALL) {
@@@ -1504,8 -1493,7 +1508,8 @@@ int stlink_write_flash(stlink_t *sl, st
      ILOG("Finished erasing %d pages of %d (%#x) bytes\n",
          page_count, sl->flash_pgsz, sl->flash_pgsz);
  
 -    if ((sl->chip_id == STM32_CHIPID_F2) || (sl->chip_id == STM32_CHIPID_F4)) {
 +    if ((sl->chip_id == STM32_CHIPID_F2) || (sl->chip_id == STM32_CHIPID_F4) ||
 +        (sl->chip_id == STM32_CHIPID_F4_LP)) {
        /* todo: check write operation */
  
          ILOG("Starting Flash write for F2/F4\n");
@@@ -1571,7 -1559,8 +1575,8 @@@
  
      } //STM32F4END
  
-     else if (sl->chip_id == STM32_CHIPID_L1_MEDIUM || sl->chip_id == STM32_CHIPID_L1_MEDIUM_PLUS)    {
+     else if (sl->chip_id == STM32_CHIPID_L1_MEDIUM || sl->chip_id == STM32_CHIPID_L1_MEDIUM_PLUS
+               || sl->chip_id == STM32_CHIPID_L1_HIGH ) {
        /* use fast word write. todo: half page. */
        uint32_t val;
  
@@@ -1727,7 -1716,8 +1732,8 @@@ int stlink_fwrite_flash(stlink_t *sl, c
      /* write the file in flash at addr */
      int err;
      unsigned int num_empty = 0, index;
-     unsigned char erased_pattern =(sl->chip_id == STM32_CHIPID_L1_MEDIUM || sl->chip_id == STM32_CHIPID_L1_MEDIUM_PLUS)?0:0xff;
+     unsigned char erased_pattern =(sl->chip_id == STM32_CHIPID_L1_MEDIUM || sl->chip_id == STM32_CHIPID_L1_MEDIUM_PLUS
+       || sl->chip_id == STM32_CHIPID_L1_HIGH )?0:0xff;
      mapped_file_t mf = MAPPED_FILE_INITIALIZER;
      if (map_file(&mf, path) == -1) {
          ELOG("map_file() == -1\n");
@@@ -1765,7 -1755,8 +1771,8 @@@ int run_flash_loader(stlink_t *sl, flas
          return -1;
      }
  
-     if (sl->chip_id == STM32_CHIPID_L1_MEDIUM  || sl->chip_id == STM32_CHIPID_L1_MEDIUM_PLUS) {
+     if (sl->chip_id == STM32_CHIPID_L1_MEDIUM  || sl->chip_id == STM32_CHIPID_L1_MEDIUM_PLUS
+       || sl->chip_id == STM32_CHIPID_L1_HIGH ) {
  
          size_t count = size / sizeof(uint32_t);
          if (size % sizeof(uint32_t)) ++count;
@@@ -1788,8 -1779,7 +1795,8 @@@
          stlink_write_reg(sl, 0, 3); /* flash bank 0 (input) */
          stlink_write_reg(sl, fl->loader_addr, 15); /* pc register */
  
 -    } else if (sl->chip_id == STM32_CHIPID_F2 || sl->chip_id == STM32_CHIPID_F4) {
 +    } else if (sl->chip_id == STM32_CHIPID_F2 ||
 +        sl->chip_id == STM32_CHIPID_F4 || sl->chip_id == STM32_CHIPID_F4_LP) {
  
          size_t count = size / sizeof(uint32_t);
          if (size % sizeof(uint32_t)) ++count;
@@@ -1808,7 -1798,7 +1815,7 @@@
      /* run loader */
      stlink_run(sl);
  
- #define WAIT_ROUNDS 1000
+ #define WAIT_ROUNDS 10000
      /* wait until done (reaches breakpoint) */
      for (i = 0; i < WAIT_ROUNDS; i++) {
          usleep(10);
@@@ -1822,7 -1812,8 +1829,8 @@@
      }
  
      /* check written byte count */
-     if (sl->chip_id == STM32_CHIPID_L1_MEDIUM || sl->chip_id == STM32_CHIPID_L1_MEDIUM_PLUS) {
+     if (sl->chip_id == STM32_CHIPID_L1_MEDIUM || sl->chip_id == STM32_CHIPID_L1_MEDIUM_PLUS
+       || sl->chip_id == STM32_CHIPID_L1_HIGH ) {
  
        size_t count = size / sizeof(uint32_t);
        if (size % sizeof(uint32_t)) ++count;
@@@ -1841,8 -1832,7 +1849,8 @@@
          return -1;
        }
  
 -    } else if (sl->chip_id == STM32_CHIPID_F2 || sl->chip_id == STM32_CHIPID_F4) {
 +    } else if (sl->chip_id == STM32_CHIPID_F2 ||
 +        sl->chip_id == STM32_CHIPID_F4 || sl->chip_id == STM32_CHIPID_F4_LP) {
  
          stlink_read_reg(sl, 2, &rr);
          if (rr.r[2] != 0) {

diff --combined src/stlink-common.h
index 8b1be82c8b4d2bf83501ed24dfa65859066a89d5,7553224cd9ba4007c8a76a41d92618413c32d256..c17019568a90b3260f5c71568958fb6c7a70b53e
--- 1/src/stlink-common.h
--- 2/src/stlink-common.h
+++ b/src/stlink-common.h
@@@ -102,10 -102,15 +102,16 @@@ extern "C" 
  #define STM32_CHIPID_F3 0x422
  #define STM32_CHIPID_F37x 0x432
  #define STM32_CHIPID_F4 0x413
 +#define STM32_CHIPID_F4_LP 0x423
  #define STM32_CHIPID_F1_HIGH 0x414
  #define STM32_CHIPID_L1_MEDIUM 0x416
- #define STM32_CHIPID_L1_MEDIUM_PLUS 0x436
+ #define STM32_CHIPID_L1_MEDIUM_PLUS 0x427
+ /*
+  * 0x436 is actually assigned to some L1 chips that are called "Medium-Plus"
+  * and some that are called "High".  0x427 is assigned to the other "Medium-
+  * plus" chips.  To make it a bit simpler we just call 427 MEDIUM_PLUS and
+  * 0x436 HIGH.
+  */
  #define STM32_CHIPID_L1_HIGH 0x436
  #define STM32_CHIPID_F1_CONN 0x418
  #define STM32_CHIPID_F1_VL_MEDIUM 0x420
@@@ -177,15 -182,6 +183,15 @@@ static const chip_params_t devices[] = 
                      .bootrom_base = 0x1fff0000,
                      .bootrom_size = 0x7800
          },
 +        {
 +            .chip_id = STM32_CHIPID_F4_LP,
 +                    .description = "F4 device (low power)",
 +                    .flash_size_reg = 0x1FFF7A10,
 +                    .flash_pagesize = 0x4000,
 +                    .sram_size = 0x10000,
 +                    .bootrom_base = 0x1fff0000,
 +                    .bootrom_size = 0x7800
 +        },
          {
              .chip_id = STM32_CHIPID_F1_HIGH,
                      .description = "F1 High-density device",
@@@ -209,12 -205,22 +215,22 @@@
          {
              .chip_id = STM32_CHIPID_L1_MEDIUM_PLUS,
                      .description = "L1 Medium-Plus-density device",
-                     .flash_size_reg = 0x1ff800CC,
+                     .flash_size_reg = 0x1ff800cc,
+                     .flash_pagesize = 0x100,
+                     .sram_size = 0x8000,/*Not completely clear if there are some with 48K*/
+                     .bootrom_base = 0x1ff00000,
+                     .bootrom_size = 0x1000
+         },
+         {
+             .chip_id = STM32_CHIPID_L1_HIGH,
+                     .description = "L1 High-density device",
+                     .flash_size_reg = 0x1ff800cc,
                      .flash_pagesize = 0x100,
-                     .sram_size = 0x8000,
+                     .sram_size = 0xC000, /*Not completely clear if there are some with 32K*/
                      .bootrom_base = 0x1ff00000,
                      .bootrom_size = 0x1000
          },
+ 
          {
              .chip_id = STM32_CHIPID_F1_CONN,
                      .description = "F1 Connectivity line device",