int fp_feature;
uint32_t demcr;
- /* stlink is a high level adapter, does not support all functions */
- bool stlink;
+ /* hla_target uses a high level adapter that does not support all functions */
+ bool is_hla_target;
struct armv7m_trace_config trace_config;
struct adiv5_dap *swjdp = cortex_m->armv7m.arm.dap;
struct armv7m_common *armv7m = target_to_armv7m(target);
- /* stlink shares the examine handler but does not support
+ /* hla_target shares the examine handler but does not support
* all its calls */
- if (!armv7m->stlink) {
+ if (!armv7m->is_hla_target) {
if (cortex_m->apsel == DP_APSEL_INVALID) {
/* Search for the MEM-AP */
retval = cortex_m_find_mem_ap(swjdp, &armv7m->debug_ap);
for (size_t idx = ARMV8M_FIRST_REG; idx <= ARMV8M_LAST_REG; idx++)
armv7m->arm.core_cache->reg_list[idx].exist = false;
- if (!armv7m->stlink) {
+ if (!armv7m->is_hla_target) {
if (cortex_m->core_info->flags & CORTEX_M_F_TAR_AUTOINCR_BLOCK_4K)
/* Cortex-M3/M4 have 4096 bytes autoincrement range,
* s. ARM IHI 0031C: MEM-AP 7.2.2 */
armv7m->store_core_reg_u32 = adapter_store_core_reg_u32;
armv7m->examine_debug_reason = adapter_examine_debug_reason;
- armv7m->stlink = true;
+ armv7m->is_hla_target = true;
target_register_timer_callback(hl_handle_target_request, 1,
TARGET_TIMER_TYPE_PERIODIC, target);