{
connection_t *connection = priv;
char *t = allocPrintf(format, args);
+ char *t2;
if (t == NULL)
return;
+ t2=t;
+ char *endline;
+ do
+ {
+ if ((endline=strchr(t2, '\n'))!=NULL)
+ {
+ *endline=0;
+ }
+ telnet_outputline(connection, t2);
+ t2=endline+1;
+ } while (endline);
- telnet_outputline(connection, t);
free(t);
}
struct command_context_s *cmd_ctx = priv;
connection_t *connection = cmd_ctx->output_handler_priv;
telnet_connection_t *t_con = connection->priv;
- char buffer[512];
switch (event)
{
case TARGET_EVENT_HALTED:
command_print(cmd_ctx, "Target %i halted", get_num_by_target(target));
- target->type->arch_state(target, buffer, 512);
- buffer[511] = 0;
- command_print(cmd_ctx, "%s", buffer);
+ target_arch_state(target);
if (!t_con->suppress_prompt)
telnet_prompt(connection);
break;
int arm720t_target_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc, struct target_s *target);
int arm720t_init_target(struct command_context_s *cmd_ctx, struct target_s *target);
int arm720t_quit();
-int arm720t_arch_state(struct target_s *target, char *buf, int buf_size);
+int arm720t_arch_state(struct target_s *target);
int arm720t_read_memory(struct target_s *target, u32 address, u32 size, u32 count, u8 *buffer);
int arm720t_write_memory(struct target_s *target, u32 address, u32 size, u32 count, u8 *buffer);
int arm720t_soft_reset_halt(struct target_s *target);
return ERROR_OK;
}
-int arm720t_arch_state(struct target_s *target, char *buf, int buf_size)
+int arm720t_arch_state(struct target_s *target)
{
armv4_5_common_t *armv4_5 = target->arch_info;
arm7_9_common_t *arm7_9 = armv4_5->arch_info;
exit(-1);
}
- snprintf(buf, buf_size,
- "target halted in %s state due to %s, current mode: %s\n"
+ USER("target halted in %s state due to %s, current mode: %s\n"
"cpsr: 0x%8.8x pc: 0x%8.8x\n"
"MMU: %s, Cache: %s",
armv4_5_state_strings[armv4_5->core_state],
return ERROR_OK;
}
-enum target_state arm7_9_poll(target_t *target)
+int arm7_9_poll(target_t *target)\r
{
int retval;
armv4_5_common_t *armv4_5 = target->arch_info;
embeddedice_read_reg(dbg_stat);
if ((retval = jtag_execute_queue()) != ERROR_OK)
{
- switch (retval)
- {
- case ERROR_JTAG_QUEUE_FAILED:
- ERROR("JTAG queue failed while reading EmbeddedICE status register");
- exit(-1);
- break;
- default:
- break;
- }
+ return retval;\r
}
if (buf_get_u32(dbg_stat->value, EICE_DBG_STATUS_DBGACK, 1))
{
DEBUG("DBGACK set, dbg_state->value: 0x%x", buf_get_u32(dbg_stat->value, 0, 32));
- if ((target->state == TARGET_UNKNOWN))
+ if (target->state == TARGET_UNKNOWN)\r
{
- WARNING("DBGACK set while target was in unknown state. Reset or initialize target before resuming");
- target->state = TARGET_RUNNING;
+ WARNING("DBGACK set while target was in unknown state. Reset or initialize target.");\r
}
if ((target->state == TARGET_RUNNING) || (target->state == TARGET_RESET))
{
target_call_event_callbacks(target, TARGET_EVENT_DEBUG_HALTED);
}
- }
+ if (target->state != TARGET_HALTED)\r
+ {\r
+ WARNING("DBGACK set, but the target did not end up in the halted stated %d", target->state);\r
+ }
+ }\r
else
{
if (target->state != TARGET_DEBUG_RUNNING)
target->state = TARGET_RUNNING;
}
- return target->state;
+ return ERROR_OK;\r
}
int arm7_9_assert_reset(target_t *target)
else
{
ERROR("BUG: dirty register '%s', but no valid data", reg->name);
- exit(-1);
}
}
}
int arm7_9_register_commands(struct command_context_s *cmd_ctx);
-enum target_state arm7_9_poll(target_t *target);
+int arm7_9_poll(target_t *target);
int arm7_9_target_request_data(target_t *target, u32 size, u8 *buffer);
int arm7tdmi_quit();
/* target function declarations */
-enum target_state arm7tdmi_poll(struct target_s *target);
+int arm7tdmi_poll(struct target_s *target);
int arm7tdmi_halt(target_t *target);
target_type_t arm7tdmi_target =
int arm920t_target_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc, struct target_s *target);
int arm920t_init_target(struct command_context_s *cmd_ctx, struct target_s *target);
int arm920t_quit();
-int arm920t_arch_state(struct target_s *target, char *buf, int buf_size);
+int arm920t_arch_state(struct target_s *target);
int arm920t_read_memory(struct target_s *target, u32 address, u32 size, u32 count, u8 *buffer);
int arm920t_write_memory(struct target_s *target, u32 address, u32 size, u32 count, u8 *buffer);
int arm920t_soft_reset_halt(struct target_s *target);
return ERROR_OK;
}
-int arm920t_arch_state(struct target_s *target, char *buf, int buf_size)
+int arm920t_arch_state(struct target_s *target)
{
armv4_5_common_t *armv4_5 = target->arch_info;
arm7_9_common_t *arm7_9 = armv4_5->arch_info;
exit(-1);
}
- snprintf(buf, buf_size,
- "target halted in %s state due to %s, current mode: %s\n"
+ USER( "target halted in %s state due to %s, current mode: %s\n"
"cpsr: 0x%8.8x pc: 0x%8.8x\n"
"MMU: %s, D-Cache: %s, I-Cache: %s",
armv4_5_state_strings[armv4_5->core_state],
int arm926ejs_target_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc, struct target_s *target);
int arm926ejs_init_target(struct command_context_s *cmd_ctx, struct target_s *target);
int arm926ejs_quit();
-int arm926ejs_arch_state(struct target_s *target, char *buf, int buf_size);
+int arm926ejs_arch_state(struct target_s *target);
int arm926ejs_read_memory(struct target_s *target, u32 address, u32 size, u32 count, u8 *buffer);
int arm926ejs_write_memory(struct target_s *target, u32 address, u32 size, u32 count, u8 *buffer);
int arm926ejs_soft_reset_halt(struct target_s *target);
return ERROR_OK;
}
-int arm926ejs_arch_state(struct target_s *target, char *buf, int buf_size)
+int arm926ejs_arch_state(struct target_s *target)
{
armv4_5_common_t *armv4_5 = target->arch_info;
arm7_9_common_t *arm7_9 = armv4_5->arch_info;
exit(-1);
}
- snprintf(buf, buf_size,
+ USER(
"target halted in %s state due to %s, current mode: %s\n"
"cpsr: 0x%8.8x pc: 0x%8.8x\n"
"MMU: %s, D-Cache: %s, I-Cache: %s",
extern int arm926ejs_init_arch_info(target_t *target, arm926ejs_common_t *arm926ejs, int chain_pos, char *variant);
extern int arm926ejs_register_commands(struct command_context_s *cmd_ctx);
-extern int arm926ejs_arch_state(struct target_s *target, char *buf, int buf_size);
+extern int arm926ejs_arch_state(struct target_s *target);
extern int arm926ejs_write_memory(struct target_s *target, u32 address, u32 size, u32 count, u8 *buffer);
extern int arm926ejs_soft_reset_halt(struct target_s *target);
return cache;
}
-int armv4_5_arch_state(struct target_s *target, char *buf, int buf_size)
+int armv4_5_arch_state(struct target_s *target)
{
armv4_5_common_t *armv4_5 = target->arch_info;
exit(-1);
}
- snprintf(buf, buf_size,
- "target halted in %s state due to %s, current mode: %s\ncpsr: 0x%8.8x pc: 0x%8.8x",
+ USER("target halted in %s state due to %s, current mode: %s\ncpsr: 0x%8.8x pc: 0x%8.8x",
armv4_5_state_strings[armv4_5->core_state],
target_debug_reason_strings[target->debug_reason],
armv4_5_mode_strings[armv4_5_mode_to_number(armv4_5->core_mode)],
extern enum armv4_5_mode armv4_5_number_to_mode(int number);
extern int armv4_5_mode_to_number(enum armv4_5_mode mode);
-extern int armv4_5_arch_state(struct target_s *target, char *buf, int buf_size);
+extern int armv4_5_arch_state(struct target_s *target);
extern int armv4_5_get_gdb_reg_list(target_t *target, reg_t **reg_list[], int *reg_list_size);
extern int armv4_5_invalidate_core_regs(target_t *target);
return ERROR_OK;
}
-enum target_state cortex_m3_poll(target_t *target)
+int cortex_m3_poll(target_t *target)
{
int retval;
u32 prev_target_state = target->state;
if (retval != ERROR_OK)
{
target->state = TARGET_UNKNOWN;
- return TARGET_UNKNOWN;
+ return retval;
}
if (cortex_m3->dcb_dhcsr & S_RESET_ST)
if (cortex_m3->dcb_dhcsr & S_RESET_ST)
{
target->state = TARGET_RESET;
- return target->state;
+ return ERROR_OK;
}
}
if ((prev_target_state == TARGET_RUNNING) || (prev_target_state == TARGET_RESET))
{
if ((retval = cortex_m3_debug_entry(target)) != ERROR_OK)
- return TARGET_UNKNOWN;
+ return retval;
target_call_event_callbacks(target, TARGET_EVENT_HALTED);
}
{
DEBUG(" ");
if ((retval = cortex_m3_debug_entry(target)) != ERROR_OK)
- return TARGET_UNKNOWN;
+ return retval;
target_call_event_callbacks(target, TARGET_EVENT_DEBUG_HALTED);
}
/* Read Debug Fault Status Register, added to figure out the lockup when running flashtest.script */
ahbap_read_system_atomic_u32(swjdp, NVIC_DFSR, &cortex_m3->nvic_dfsr);
DEBUG("dcb_dhcsr 0x%x, nvic_dfsr 0x%x, target->state: %s", cortex_m3->dcb_dhcsr, cortex_m3->nvic_dfsr, target_state_strings[target->state]);
- return target->state;
+ return ERROR_OK;
}
int cortex_m3_halt(target_t *target)
extern void cortex_m3_build_reg_cache(target_t *target);
-enum target_state cortex_m3_poll(target_t *target);
+int cortex_m3_poll(target_t *target);
int cortex_m3_halt(target_t *target);
int cortex_m3_resume(struct target_s *target, int current, u32 address, int handle_breakpoints, int debug_execution);
int cortex_m3_step(struct target_s *target, int current, u32 address, int handle_breakpoints);
int cli_target_callback_event_handler(struct target_s *target, enum target_event event, void *priv);
+
+int handle_arch_state_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc);
int handle_target_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc);
int handle_daemon_startup_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc);
int handle_targets_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc);
static int default_mmu(struct target_s *target, int *enabled)
{
- USER("No MMU present");
*enabled = 0;
return ERROR_OK;
}
register_command(cmd_ctx, NULL, "run_and_halt_time", handle_run_and_halt_time_command, COMMAND_CONFIG, NULL);
register_command(cmd_ctx, NULL, "working_area", handle_working_area_command, COMMAND_ANY, "working_area <target#> <address> <size> <'backup'|'nobackup'> [virtual address]");
register_command(cmd_ctx, NULL, "virt2phys", handle_virt2phys_command, COMMAND_ANY, "virt2phys <virtual address>");
+ register_command(cmd_ctx, NULL, "arch_state", handle_arch_state_command, COMMAND_ANY, "prints CPU state information");
return ERROR_OK;
}
+int target_arch_state(struct target_s *target)
+{
+ int retval;
+ if (target==NULL)
+ {
+ USER("No target has been configured");
+ return ERROR_OK;
+ }
+
+ USER("target state: %s", target_state_strings[target->state]);
+
+ if (target->state!=TARGET_HALTED)
+ return ERROR_OK;
+
+ retval=target->type->arch_state(target);
+ return retval;
+}
+
/* Single aligned words are guaranteed to use 16 or 32 bit access
* mode respectively, otherwise data is handled as quickly as
* possible
if (target->state != TARGET_HALTED)
{
if (target_continous_poll)
- if ((retval = target->type->poll(target)) < 0)
+ if ((retval = target->type->poll(target)) != ERROR_OK)
{
- ERROR("couldn't poll target. It's due for a reset.");
+ ERROR("couldn't poll target(%d). It's due for a reset.", retval);
}
}
int handle_poll_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc)
{
target_t *target = get_current_target(cmd_ctx);
- char buffer[512];
if (argc == 0)
{
- command_print(cmd_ctx, "target state: %s", target_state_strings[target->type->poll(target)]);
+ target->type->poll(target);
+ command_print(cmd_ctx, "target state: %s", target_state_strings[target->state]);
if (target->state == TARGET_HALTED)
{
- target->type->arch_state(target, buffer, 512);
- buffer[511] = 0;
- command_print(cmd_ctx, "%s", buffer);
+ target_arch_state(target);
}
}
else
static int wait_state(struct command_context_s *cmd_ctx, char *cmd, enum target_state state, int ms)
{
+ int retval;
struct timeval timeout, now;
gettimeofday(&timeout, NULL);
command_print(cmd_ctx, "waiting for target %s...", target_state_strings[state]);
target_t *target = get_current_target(cmd_ctx);
- while (target->type->poll(target))
+ for (;;)
{
+ if ((retval=target->type->poll(target))!=ERROR_OK)
+ return retval;
target_call_timer_callbacks();
if (target->state == state)
{
}
return retval;
}
+int handle_arch_state_command(command_context_t *cmd_ctx, char *cmd, char **args, int argc)
+{
+ int retval;
+ if (argc!=0)
+ return ERROR_COMMAND_SYNTAX_ERROR;
+
+ target_t *target = get_target_by_num(cmd_ctx->current_target);
+ retval=target_arch_state(target);
+ return retval;
+}
char *name;
/* poll current target status */
- enum target_state (*poll)(struct target_s *target);
- /* architecture specific status reply */
- int (*arch_state)(struct target_s *target, char *buf, int buf_size);
+ int (*poll)(struct target_s *target);
+ /* Invoked only from target_arch_state().
+ * Issue USER() w/architecture specific status. */
+ int (*arch_state)(struct target_s *target);
/* target request support */
int (*target_request_data)(struct target_s *target, u32 size, u8 *buffer);
int xscale_init_target(struct command_context_s *cmd_ctx, struct target_s *target);
int xscale_quit();
-int xscale_arch_state(struct target_s *target, char *buf, int buf_size);
-enum target_state xscale_poll(target_t *target);
+int xscale_arch_state(struct target_s *target);
+int xscale_poll(target_t *target);
int xscale_halt(target_t *target);
int xscale_resume(struct target_s *target, int current, u32 address, int handle_breakpoints, int debug_execution);
int xscale_step(struct target_s *target, int current, u32 address, int handle_breakpoints);
return ERROR_OK;
}
-int xscale_arch_state(struct target_s *target, char *buf, int buf_size)
+int xscale_arch_state(struct target_s *target)
{
armv4_5_common_t *armv4_5 = target->arch_info;
xscale_common_t *xscale = armv4_5->arch_info;
exit(-1);
}
- snprintf(buf, buf_size,
- "target halted in %s state due to %s, current mode: %s\n"
+ USER("target halted in %s state due to %s, current mode: %s\n"
"cpsr: 0x%8.8x pc: 0x%8.8x\n"
"MMU: %s, D-Cache: %s, I-Cache: %s"
"%s",
return ERROR_OK;
}
-enum target_state xscale_poll(target_t *target)
+int xscale_poll(target_t *target)
{
- int retval;
+ int retval=ERROR_OK;
armv4_5_common_t *armv4_5 = target->arch_info;
xscale_common_t *xscale = armv4_5->arch_info;
if ((target->state == TARGET_RUNNING) || (target->state == TARGET_DEBUG_RUNNING))
{
+ enum target_state previous_state = target->state;
if ((retval = xscale_read_tx(target, 0)) == ERROR_OK)
{
- enum target_state previous_state = target->state;
/* there's data to read from the tx register, we entered debug state */
xscale->handler_running = 1;
target->state = TARGET_HALTED;
/* process debug entry, fetching current mode regs */
- if ((retval = xscale_debug_entry(target)) != ERROR_OK)
- return retval;
+ retval = xscale_debug_entry(target);
+ }
+ else if (retval != ERROR_TARGET_RESOURCE_NOT_AVAILABLE)
+ {
+ USER("error while polling TX register, reset CPU");
+ /* here we "lie" so GDB won't get stuck and a reset can be perfomed */
+ target->state = TARGET_HALTED;
+ }
/* debug_entry could have overwritten target state (i.e. immediate resume)
* don't signal event handlers in that case
*/
- if (target->state != TARGET_HALTED)
- return target->state;
+ if (target->state != TARGET_HALTED)
+ return ERROR_OK;
- /* if target was running, signal that we halted
- * otherwise we reentered from debug execution */
- if (previous_state == TARGET_RUNNING)
- target_call_event_callbacks(target, TARGET_EVENT_HALTED);
- else
- target_call_event_callbacks(target, TARGET_EVENT_DEBUG_HALTED);
- }
- else if (retval != ERROR_TARGET_RESOURCE_NOT_AVAILABLE)
- {
- ERROR("error while polling TX register");
- return retval;
- }
+ /* if target was running, signal that we halted
+ * otherwise we reentered from debug execution */
+ if (previous_state == TARGET_RUNNING)
+ target_call_event_callbacks(target, TARGET_EVENT_HALTED);
+ else
+ target_call_event_callbacks(target, TARGET_EVENT_DEBUG_HALTED);
}
-
- return target->state;
+ return retval;
}
int xscale_debug_entry(target_t *target)