#include <string.h>
#include <unistd.h>
-int aduc702x_flash_bank_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc, struct flash_bank_s *bank);
-int aduc702x_register_commands(struct command_context_s *cmd_ctx);
-int aduc702x_erase(struct flash_bank_s *bank, int first, int last);
-int aduc702x_protect(struct flash_bank_s *bank, int set, int first, int last);
-int aduc702x_write(struct flash_bank_s *bank, u8 *buffer, u32 offset, u32 count);
-int aduc702x_write_single(struct flash_bank_s *bank, u8 *buffer, u32 offset, u32 count);
-int aduc702x_write_block(struct flash_bank_s *bank, u8 *buffer, u32 offset, u32 count);
-int aduc702x_probe(struct flash_bank_s *bank);
-int aduc702x_info(struct flash_bank_s *bank, char *buf, int buf_size);
-int aduc702x_protect_check(struct flash_bank_s *bank);
-int aduc702x_build_sector_list(struct flash_bank_s *bank);
-int aduc702x_check_flash_completion(target_t* target, unsigned int timeout_ms);
-int aduc702x_set_write_enable(target_t *target, int enable);
+static int aduc702x_flash_bank_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc, struct flash_bank_s *bank);
+static int aduc702x_register_commands(struct command_context_s *cmd_ctx);
+static int aduc702x_erase(struct flash_bank_s *bank, int first, int last);
+static int aduc702x_protect(struct flash_bank_s *bank, int set, int first, int last);
+static int aduc702x_write(struct flash_bank_s *bank, u8 *buffer, u32 offset, u32 count);
+static int aduc702x_write_single(struct flash_bank_s *bank, u8 *buffer, u32 offset, u32 count);
+static int aduc702x_write_block(struct flash_bank_s *bank, u8 *buffer, u32 offset, u32 count);
+static int aduc702x_probe(struct flash_bank_s *bank);
+static int aduc702x_info(struct flash_bank_s *bank, char *buf, int buf_size);
+static int aduc702x_protect_check(struct flash_bank_s *bank);
+static int aduc702x_build_sector_list(struct flash_bank_s *bank);
+static int aduc702x_check_flash_completion(target_t* target, unsigned int timeout_ms);
+static int aduc702x_set_write_enable(target_t *target, int enable);
#define ADUC702x_FLASH 0xfffff800
#define ADUC702x_FLASH_FEESTA (0*4)
.info = aduc702x_info
};
-int aduc702x_register_commands(struct command_context_s *cmd_ctx)
+static int aduc702x_register_commands(struct command_context_s *cmd_ctx)
{
return ERROR_OK;
}
/* flash bank aduc702x 0 0 0 0 <target#>
* The ADC7019-28 devices all have the same flash layout */
-int aduc702x_flash_bank_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc, struct flash_bank_s *bank)
+static int aduc702x_flash_bank_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc, struct flash_bank_s *bank)
{
aduc702x_flash_bank_t *nbank;
return ERROR_OK;
}
-int aduc702x_build_sector_list(struct flash_bank_s *bank)
+static int aduc702x_build_sector_list(struct flash_bank_s *bank)
{
//aduc7026_flash_bank_t *aduc7026_info = bank->driver_priv;
return ERROR_OK;
}
-int aduc702x_protect_check(struct flash_bank_s *bank)
+static int aduc702x_protect_check(struct flash_bank_s *bank)
{
printf("aduc702x_protect_check not implemented yet.\n");
return ERROR_OK;
}
-int aduc702x_erase(struct flash_bank_s *bank, int first, int last)
+static int aduc702x_erase(struct flash_bank_s *bank, int first, int last)
{
//int res;
int x;
return ERROR_OK;
}
-int aduc702x_protect(struct flash_bank_s *bank, int set, int first, int last)
+static int aduc702x_protect(struct flash_bank_s *bank, int set, int first, int last)
{
printf("aduc702x_protect not implemented yet.\n");
return ERROR_FLASH_OPERATION_FAILED;
}
-int aduc702x_write_block(struct flash_bank_s *bank, u8 *buffer, u32 offset, u32 count)
+static int aduc702x_write_block(struct flash_bank_s *bank, u8 *buffer, u32 offset, u32 count)
{
aduc702x_flash_bank_t *aduc702x_info = bank->driver_priv;
target_t *target = bank->target;
/* All-JTAG, single-access method. Very slow. Used only if there is no
* working area available. */
-int aduc702x_write_single(struct flash_bank_s *bank, u8 *buffer, u32 offset, u32 count)
+static int aduc702x_write_single(struct flash_bank_s *bank, u8 *buffer, u32 offset, u32 count)
{
int x;
u8 b;
return ERROR_OK;
}
-int aduc702x_probe(struct flash_bank_s *bank)
+static int aduc702x_probe(struct flash_bank_s *bank)
{
return ERROR_OK;
}
-int aduc702x_info(struct flash_bank_s *bank, char *buf, int buf_size)
+static int aduc702x_info(struct flash_bank_s *bank, char *buf, int buf_size)
{
snprintf(buf, buf_size, "aduc702x flash driver info" );
return ERROR_OK;
/* sets FEEMOD bit 3
* enable = 1 enables writes & erases, 0 disables them */
-int aduc702x_set_write_enable(target_t *target, int enable)
+static int aduc702x_set_write_enable(target_t *target, int enable)
{
// don't bother to preserve int enable bit here
target_write_u16(target, ADUC702x_FLASH + ADUC702x_FLASH_FEEMOD, enable ? 8 : 0);
*
* this function sleeps 1ms between checks (after the first one),
* so in some cases may slow things down without a usleep after the first read */
-int aduc702x_check_flash_completion(target_t* target, unsigned int timeout_ms)
+static int aduc702x_check_flash_completion(target_t* target, unsigned int timeout_ms)
{
u8 v = 4;
#include <string.h>
#include <unistd.h>
-int at91sam7_register_commands(struct command_context_s *cmd_ctx);
-int at91sam7_flash_bank_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc, struct flash_bank_s *bank);
-int at91sam7_erase(struct flash_bank_s *bank, int first, int last);
-int at91sam7_protect(struct flash_bank_s *bank, int set, int first, int last);
-int at91sam7_write(struct flash_bank_s *bank, u8 *buffer, u32 offset, u32 count);
-int at91sam7_probe(struct flash_bank_s *bank);
-int at91sam7_auto_probe(struct flash_bank_s *bank);
-int at91sam7_erase_check(struct flash_bank_s *bank);
-int at91sam7_protect_check(struct flash_bank_s *bank);
-int at91sam7_info(struct flash_bank_s *bank, char *buf, int buf_size);
-
-u32 at91sam7_get_flash_status(target_t *target, int bank_number);
-void at91sam7_set_flash_mode(flash_bank_t *bank, int mode);
-u32 at91sam7_wait_status_busy(flash_bank_t *bank, u32 waitbits, int timeout);
-int at91sam7_flash_command(struct flash_bank_s *bank, u8 cmd, u16 pagen);
-int at91sam7_handle_gpnvm_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc);
+static int at91sam7_register_commands(struct command_context_s *cmd_ctx);
+static int at91sam7_flash_bank_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc, struct flash_bank_s *bank);
+static int at91sam7_erase(struct flash_bank_s *bank, int first, int last);
+static int at91sam7_protect(struct flash_bank_s *bank, int set, int first, int last);
+static int at91sam7_write(struct flash_bank_s *bank, u8 *buffer, u32 offset, u32 count);
+static int at91sam7_probe(struct flash_bank_s *bank);
+//static int at91sam7_auto_probe(struct flash_bank_s *bank);
+static int at91sam7_erase_check(struct flash_bank_s *bank);
+static int at91sam7_protect_check(struct flash_bank_s *bank);
+static int at91sam7_info(struct flash_bank_s *bank, char *buf, int buf_size);
+
+static u32 at91sam7_get_flash_status(target_t *target, int bank_number);
+static void at91sam7_set_flash_mode(flash_bank_t *bank, int mode);
+static u32 at91sam7_wait_status_busy(flash_bank_t *bank, u32 waitbits, int timeout);
+static int at91sam7_flash_command(struct flash_bank_s *bank, u8 cmd, u16 pagen);
+static int at91sam7_handle_gpnvm_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc);
flash_driver_t at91sam7_flash =
{
.info = at91sam7_info
};
-u32 MC_FMR[4] = { 0xFFFFFF60, 0xFFFFFF70, 0xFFFFFF80, 0xFFFFFF90 };
-u32 MC_FCR[4] = { 0xFFFFFF64, 0xFFFFFF74, 0xFFFFFF84, 0xFFFFFF94 };
-u32 MC_FSR[4] = { 0xFFFFFF68, 0xFFFFFF78, 0xFFFFFF88, 0xFFFFFF98 };
+static u32 MC_FMR[4] = { 0xFFFFFF60, 0xFFFFFF70, 0xFFFFFF80, 0xFFFFFF90 };
+static u32 MC_FCR[4] = { 0xFFFFFF64, 0xFFFFFF74, 0xFFFFFF84, 0xFFFFFF94 };
+static u32 MC_FSR[4] = { 0xFFFFFF68, 0xFFFFFF78, 0xFFFFFF88, 0xFFFFFF98 };
-char * EPROC[8]= {"Unknown","ARM946-E","ARM7TDMI","Unknown","ARM920T","ARM926EJ-S","Unknown","Unknown"};
+static char * EPROC[8]= {"Unknown","ARM946-E","ARM7TDMI","Unknown","ARM920T","ARM926EJ-S","Unknown","Unknown"};
-long SRAMSIZ[16] = {
+#if 0
+static long SRAMSIZ[16] = {
-1,
0x0400, /* 1K */
0x0800, /* 2K */
0x18000, /* 96K */
0x80000, /* 512K */
};
+#endif
-int at91sam7_register_commands(struct command_context_s *cmd_ctx)
+static int at91sam7_register_commands(struct command_context_s *cmd_ctx)
{
command_t *at91sam7_cmd = register_command(cmd_ctx, NULL, "at91sam7_new", NULL, COMMAND_ANY, NULL);
return ERROR_OK;
}
-u32 at91sam7_get_flash_status(target_t *target, int bank_number)
+static u32 at91sam7_get_flash_status(target_t *target, int bank_number)
{
u32 fsr;
target_read_u32(target, MC_FSR[bank_number], &fsr);
}
/* Read clock configuration and set at91sam7_info->mck_freq */
-void at91sam7_read_clock_info(flash_bank_t *bank)
+static void at91sam7_read_clock_info(flash_bank_t *bank)
{
at91sam7_flash_bank_t *at91sam7_info = bank->driver_priv;
target_t *target = bank->target;
}
/* Setup the timimg registers for nvbits or normal flash */
-void at91sam7_set_flash_mode(flash_bank_t *bank, int mode)
+static void at91sam7_set_flash_mode(flash_bank_t *bank, int mode)
{
u32 fmr, fmcn = 0, fws = 0;
at91sam7_flash_bank_t *at91sam7_info = bank->driver_priv;
at91sam7_info->flashmode = mode;
}
-u32 at91sam7_wait_status_busy(flash_bank_t *bank, u32 waitbits, int timeout)
+static u32 at91sam7_wait_status_busy(flash_bank_t *bank, u32 waitbits, int timeout)
{
u32 status;
}
/* Send one command to the AT91SAM flash controller */
-int at91sam7_flash_command(struct flash_bank_s *bank, u8 cmd, u16 pagen)
+static int at91sam7_flash_command(struct flash_bank_s *bank, u8 cmd, u16 pagen)
{
u32 fcr;
at91sam7_flash_bank_t *at91sam7_info = bank->driver_priv;
}
/* Read device id register, main clock frequency register and fill in driver info structure */
-int at91sam7_read_part_info(struct flash_bank_s *bank)
+static int at91sam7_read_part_info(struct flash_bank_s *bank)
{
flash_bank_t *t_bank = bank;
at91sam7_flash_bank_t *at91sam7_info;
return ERROR_OK;
}
-int at91sam7_erase_check(struct flash_bank_s *bank)
+static int at91sam7_erase_check(struct flash_bank_s *bank)
{
target_t *target = bank->target;
u16 retval;
return ERROR_OK;
}
-int at91sam7_protect_check(struct flash_bank_s *bank)
+static int at91sam7_protect_check(struct flash_bank_s *bank)
{
u8 lock_pos, gpnvm_pos;
u32 status;
# flash bank at91sam7 0x00100000 0 0 4 0 0 AT91SAM7XC256 1 16 64 256 3 0 ==== NOT RECOMENDED !!! ====
# flash bank at91sam7 0 0 0 0 0 (old style, full auto-detection) ==== NOT RECOMENDED !!! ====
****************************************************************************************************************************************************************************************/
-int at91sam7_flash_bank_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc, struct flash_bank_s *bank)
+static int at91sam7_flash_bank_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc, struct flash_bank_s *bank)
{
flash_bank_t *t_bank = bank;
at91sam7_flash_bank_t *at91sam7_info;
return ERROR_OK;
}
-int at91sam7_erase(struct flash_bank_s *bank, int first, int last)
+static int at91sam7_erase(struct flash_bank_s *bank, int first, int last)
{
at91sam7_flash_bank_t *at91sam7_info = bank->driver_priv;
int sec;
return ERROR_OK;
}
-int at91sam7_protect(struct flash_bank_s *bank, int set, int first, int last)
+static int at91sam7_protect(struct flash_bank_s *bank, int set, int first, int last)
{
u32 cmd;
u32 sector, pagen;
return ERROR_OK;
}
-int at91sam7_write(struct flash_bank_s *bank, u8 *buffer, u32 offset, u32 count)
+static int at91sam7_write(struct flash_bank_s *bank, u8 *buffer, u32 offset, u32 count)
{
int retval;
at91sam7_flash_bank_t *at91sam7_info = bank->driver_priv;
return ERROR_OK;
}
-int at91sam7_probe(struct flash_bank_s *bank)
+static int at91sam7_probe(struct flash_bank_s *bank)
{
/* we can't probe on an at91sam7
* if this is an at91sam7, it has the configured flash */
return ERROR_OK;
}
-int at91sam7_info(struct flash_bank_s *bank, char *buf, int buf_size)
+static int at91sam7_info(struct flash_bank_s *bank, char *buf, int buf_size)
{
int printed;
at91sam7_flash_bank_t *at91sam7_info = bank->driver_priv;
* The maximum number of write/erase cycles for Non volatile Memory bits is 100. this includes
* Lock Bits (LOCKx), General Purpose NVM bits (GPNVMx) and the Security Bit.
*/
-int at91sam7_handle_gpnvm_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc)
+static int at91sam7_handle_gpnvm_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc)
{
flash_bank_t *bank;
int bit;
#include <string.h>
#include <unistd.h>
-int at91sam7_old_register_commands(struct command_context_s *cmd_ctx);
-int at91sam7_old_flash_bank_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc, struct flash_bank_s *bank);
-int at91sam7_old_erase(struct flash_bank_s *bank, int first, int last);
-int at91sam7_old_protect(struct flash_bank_s *bank, int set, int first, int last);
-int at91sam7_old_write(struct flash_bank_s *bank, u8 *buffer, u32 offset, u32 count);
-int at91sam7_old_probe(struct flash_bank_s *bank);
-int at91sam7_old_auto_probe(struct flash_bank_s *bank);
-int at91sam7_old_erase_check(struct flash_bank_s *bank);
-int at91sam7_old_protect_check(struct flash_bank_s *bank);
-int at91sam7_old_info(struct flash_bank_s *bank, char *buf, int buf_size);
-
-u32 at91sam7_old_get_flash_status(flash_bank_t *bank, u8 flashplane);
-void at91sam7_old_set_flash_mode(flash_bank_t *bank, u8 flashplane, int mode);
-u32 at91sam7_old_wait_status_busy(flash_bank_t *bank, u8 flashplane, u32 waitbits, int timeout);
-int at91sam7_old_flash_command(struct flash_bank_s *bank, u8 flashplane, u8 cmd, u16 pagen);
-int at91sam7_old_handle_gpnvm_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc);
+static int at91sam7_old_register_commands(struct command_context_s *cmd_ctx);
+static int at91sam7_old_flash_bank_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc, struct flash_bank_s *bank);
+static int at91sam7_old_erase(struct flash_bank_s *bank, int first, int last);
+static int at91sam7_old_protect(struct flash_bank_s *bank, int set, int first, int last);
+static int at91sam7_old_write(struct flash_bank_s *bank, u8 *buffer, u32 offset, u32 count);
+static int at91sam7_old_probe(struct flash_bank_s *bank);
+//static int at91sam7_old_auto_probe(struct flash_bank_s *bank);
+static int at91sam7_old_erase_check(struct flash_bank_s *bank);
+static int at91sam7_old_protect_check(struct flash_bank_s *bank);
+static int at91sam7_old_info(struct flash_bank_s *bank, char *buf, int buf_size);
+
+static u32 at91sam7_old_get_flash_status(flash_bank_t *bank, u8 flashplane);
+static void at91sam7_old_set_flash_mode(flash_bank_t *bank, u8 flashplane, int mode);
+static u32 at91sam7_old_wait_status_busy(flash_bank_t *bank, u8 flashplane, u32 waitbits, int timeout);
+static int at91sam7_old_flash_command(struct flash_bank_s *bank, u8 flashplane, u8 cmd, u16 pagen);
+static int at91sam7_old_handle_gpnvm_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc);
flash_driver_t at91sam7_old_flash =
{
.info = at91sam7_old_info
};
-u32 MC_FMR_old[4] = { 0xFFFFFF60, 0xFFFFFF70, 0xFFFFFF80, 0xFFFFFF90 };
-u32 MC_FCR_old[4] = { 0xFFFFFF64, 0xFFFFFF74, 0xFFFFFF84, 0xFFFFFF94 };
-u32 MC_FSR_old[4] = { 0xFFFFFF68, 0xFFFFFF78, 0xFFFFFF88, 0xFFFFFF98 };
+static u32 MC_FMR_old[4] = { 0xFFFFFF60, 0xFFFFFF70, 0xFFFFFF80, 0xFFFFFF90 };
+static u32 MC_FCR_old[4] = { 0xFFFFFF64, 0xFFFFFF74, 0xFFFFFF84, 0xFFFFFF94 };
+static u32 MC_FSR_old[4] = { 0xFFFFFF68, 0xFFFFFF78, 0xFFFFFF88, 0xFFFFFF98 };
-char * EPROC_old[8]= {"Unknown","ARM946-E","ARM7TDMI","Unknown","ARM920T","ARM926EJ-S","Unknown","Unknown"};
-long NVPSIZ_old[16] = {
+static char * EPROC_old[8]= {"Unknown","ARM946-E","ARM7TDMI","Unknown","ARM920T","ARM926EJ-S","Unknown","Unknown"};
+static long NVPSIZ_old[16] = {
0,
0x2000, /* 8K */
0x4000, /* 16K */
-1
};
-long SRAMSIZ_old[16] = {
+#if 0
+static long SRAMSIZ_old[16] = {
-1,
0x0400, /* 1K */
0x0800, /* 2K */
0x18000, /* 96K */
0x80000, /* 512K */
};
+#endif
-int at91sam7_old_register_commands(struct command_context_s *cmd_ctx)
+static int at91sam7_old_register_commands(struct command_context_s *cmd_ctx)
{
command_t *at91sam7_old_cmd = register_command(cmd_ctx, NULL, "at91sam7", NULL, COMMAND_ANY, NULL);
register_command(cmd_ctx, at91sam7_old_cmd, "gpnvm", at91sam7_old_handle_gpnvm_command, COMMAND_EXEC,
return ERROR_OK;
}
-u32 at91sam7_old_get_flash_status(flash_bank_t *bank, u8 flashplane)
+static u32 at91sam7_old_get_flash_status(flash_bank_t *bank, u8 flashplane)
{
target_t *target = bank->target;
u32 fsr;
}
/* Read clock configuration and set at91sam7_old_info->usec_clocks*/
-void at91sam7_old_read_clock_info(flash_bank_t *bank)
+static void at91sam7_old_read_clock_info(flash_bank_t *bank)
{
at91sam7_old_flash_bank_t *at91sam7_old_info = bank->driver_priv;
target_t *target = bank->target;
}
/* Setup the timimg registers for nvbits or normal flash */
-void at91sam7_old_set_flash_mode(flash_bank_t *bank, u8 flashplane, int mode)
+static void at91sam7_old_set_flash_mode(flash_bank_t *bank, u8 flashplane, int mode)
{
u32 fmr, fmcn = 0, fws = 0;
at91sam7_old_flash_bank_t *at91sam7_old_info = bank->driver_priv;
at91sam7_old_info->flashmode[flashplane] = mode;
}
-u32 at91sam7_old_wait_status_busy(flash_bank_t *bank, u8 flashplane, u32 waitbits, int timeout)
+static u32 at91sam7_old_wait_status_busy(flash_bank_t *bank, u8 flashplane, u32 waitbits, int timeout)
{
u32 status;
/* Send one command to the AT91SAM flash controller */
-int at91sam7_old_flash_command(struct flash_bank_s *bank, u8 flashplane, u8 cmd, u16 pagen)
+static int at91sam7_old_flash_command(struct flash_bank_s *bank, u8 flashplane, u8 cmd, u16 pagen)
{
u32 fcr;
at91sam7_old_flash_bank_t *at91sam7_old_info = bank->driver_priv;
}
/* Read device id register, main clock frequency register and fill in driver info structure */
-int at91sam7_old_read_part_info(struct flash_bank_s *bank)
+static int at91sam7_old_read_part_info(struct flash_bank_s *bank)
{
at91sam7_old_flash_bank_t *at91sam7_old_info = bank->driver_priv;
target_t *target = bank->target;
return ERROR_OK;
}
-int at91sam7_old_protect_check(struct flash_bank_s *bank)
+static int at91sam7_old_protect_check(struct flash_bank_s *bank)
{
u32 status;
int flashplane;
return ERROR_OK;
}
-int at91sam7_old_erase(struct flash_bank_s *bank, int first, int last)
+static int at91sam7_old_erase(struct flash_bank_s *bank, int first, int last)
{
at91sam7_old_flash_bank_t *at91sam7_old_info = bank->driver_priv;
u8 flashplane;
}
-int at91sam7_old_write(struct flash_bank_s *bank, u8 *buffer, u32 offset, u32 count)
+static int at91sam7_old_write(struct flash_bank_s *bank, u8 *buffer, u32 offset, u32 count)
{
at91sam7_old_flash_bank_t *at91sam7_old_info = bank->driver_priv;
target_t *target = bank->target;
}
-int at91sam7_old_probe(struct flash_bank_s *bank)
+static int at91sam7_old_probe(struct flash_bank_s *bank)
{
/* we can't probe on an at91sam7_old
* if this is an at91sam7_old, it has the configured flash
}
-int at91sam7_old_info(struct flash_bank_s *bank, char *buf, int buf_size)
+static int at91sam7_old_info(struct flash_bank_s *bank, char *buf, int buf_size)
{
int printed, flashplane;
at91sam7_old_flash_bank_t *at91sam7_old_info = bank->driver_priv;
* The maximum number of write/erase cycles for Non Volatile Memory bits is 100. This includes
* Lock Bits (LOCKx), General Purpose NVM bits (GPNVMx) and the Security Bit.
*/
-int at91sam7_old_handle_gpnvm_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc)
+static int at91sam7_old_handle_gpnvm_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc)
{
flash_bank_t *bank;
int bit;
#include <string.h>
#include <unistd.h>
-int cfi_register_commands(struct command_context_s *cmd_ctx);
-int cfi_flash_bank_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc, struct flash_bank_s *bank);
-int cfi_erase(struct flash_bank_s *bank, int first, int last);
-int cfi_protect(struct flash_bank_s *bank, int set, int first, int last);
-int cfi_write(struct flash_bank_s *bank, u8 *buffer, u32 offset, u32 count);
-int cfi_probe(struct flash_bank_s *bank);
-int cfi_auto_probe(struct flash_bank_s *bank);
-int cfi_protect_check(struct flash_bank_s *bank);
-int cfi_info(struct flash_bank_s *bank, char *buf, int buf_size);
-
-int cfi_handle_part_id_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc);
+static int cfi_register_commands(struct command_context_s *cmd_ctx);
+static int cfi_flash_bank_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc, struct flash_bank_s *bank);
+static int cfi_erase(struct flash_bank_s *bank, int first, int last);
+static int cfi_protect(struct flash_bank_s *bank, int set, int first, int last);
+static int cfi_write(struct flash_bank_s *bank, u8 *buffer, u32 offset, u32 count);
+static int cfi_probe(struct flash_bank_s *bank);
+static int cfi_auto_probe(struct flash_bank_s *bank);
+static int cfi_protect_check(struct flash_bank_s *bank);
+static int cfi_info(struct flash_bank_s *bank, char *buf, int buf_size);
+
+//static int cfi_handle_part_id_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc);
#define CFI_MAX_BUS_WIDTH 4
#define CFI_MAX_CHIP_WIDTH 4
.info = cfi_info
};
-cfi_unlock_addresses_t cfi_unlock_addresses[] =
+static cfi_unlock_addresses_t cfi_unlock_addresses[] =
{
[CFI_UNLOCK_555_2AA] = { .unlock1 = 0x555, .unlock2 = 0x2aa },
[CFI_UNLOCK_5555_2AAA] = { .unlock1 = 0x5555, .unlock2 = 0x2aaa },
};
/* CFI fixups foward declarations */
-void cfi_fixup_0002_erase_regions(flash_bank_t *flash, void *param);
-void cfi_fixup_0002_unlock_addresses(flash_bank_t *flash, void *param);
-void cfi_fixup_atmel_reversed_erase_regions(flash_bank_t *flash, void *param);
+static void cfi_fixup_0002_erase_regions(flash_bank_t *flash, void *param);
+static void cfi_fixup_0002_unlock_addresses(flash_bank_t *flash, void *param);
+static void cfi_fixup_atmel_reversed_erase_regions(flash_bank_t *flash, void *param);
/* fixup after identifying JEDEC manufactuer and ID */
-cfi_fixup_t cfi_jedec_fixups[] = {
+static cfi_fixup_t cfi_jedec_fixups[] = {
{CFI_MFR_SST, 0x00D4, cfi_fixup_non_cfi, NULL},
{CFI_MFR_SST, 0x00D5, cfi_fixup_non_cfi, NULL},
{CFI_MFR_SST, 0x00D6, cfi_fixup_non_cfi, NULL},
};
/* fixup after reading cmdset 0002 primary query table */
-cfi_fixup_t cfi_0002_fixups[] = {
+static cfi_fixup_t cfi_0002_fixups[] = {
{CFI_MFR_SST, 0x00D4, cfi_fixup_0002_unlock_addresses, &cfi_unlock_addresses[CFI_UNLOCK_5555_2AAA]},
{CFI_MFR_SST, 0x00D5, cfi_fixup_0002_unlock_addresses, &cfi_unlock_addresses[CFI_UNLOCK_5555_2AAA]},
{CFI_MFR_SST, 0x00D6, cfi_fixup_0002_unlock_addresses, &cfi_unlock_addresses[CFI_UNLOCK_5555_2AAA]},
};
/* fixup after reading cmdset 0001 primary query table */
-cfi_fixup_t cfi_0001_fixups[] = {
+static cfi_fixup_t cfi_0001_fixups[] = {
{0, 0, NULL, NULL}
};
-void cfi_fixup(flash_bank_t *bank, cfi_fixup_t *fixups)
+static void cfi_fixup(flash_bank_t *bank, cfi_fixup_t *fixups)
{
cfi_flash_bank_t *cfi_info = bank->driver_priv;
cfi_fixup_t *f;
}
-void cfi_command(flash_bank_t *bank, u8 cmd, u8 *cmd_buf)
+static void cfi_command(flash_bank_t *bank, u8 cmd, u8 *cmd_buf)
{
int i;
* flash banks are expected to be made of similar chips
* the query result should be the same for all
*/
-u8 cfi_query_u8(flash_bank_t *bank, int sector, u32 offset)
+static u8 cfi_query_u8(flash_bank_t *bank, int sector, u32 offset)
{
target_t *target = bank->target;
u8 data[CFI_MAX_BUS_WIDTH];
* in case of a bank made of multiple chips,
* the individual values are ORed
*/
-u8 cfi_get_u8(flash_bank_t *bank, int sector, u32 offset)
+static u8 cfi_get_u8(flash_bank_t *bank, int sector, u32 offset)
{
target_t *target = bank->target;
u8 data[CFI_MAX_BUS_WIDTH];
}
}
-u16 cfi_query_u16(flash_bank_t *bank, int sector, u32 offset)
+static u16 cfi_query_u16(flash_bank_t *bank, int sector, u32 offset)
{
target_t *target = bank->target;
u8 data[CFI_MAX_BUS_WIDTH * 2];
return data[bank->bus_width - 1] | data[(2 * bank->bus_width) - 1] << 8;
}
-u32 cfi_query_u32(flash_bank_t *bank, int sector, u32 offset)
+static u32 cfi_query_u32(flash_bank_t *bank, int sector, u32 offset)
{
target_t *target = bank->target;
u8 data[CFI_MAX_BUS_WIDTH * 4];
data[(3 * bank->bus_width) - 1] << 16 | data[(4 * bank->bus_width) - 1] << 24;
}
-void cfi_intel_clear_status_register(flash_bank_t *bank)
+static void cfi_intel_clear_status_register(flash_bank_t *bank)
{
target_t *target = bank->target;
u8 command[8];
return(ERROR_FLASH_BUSY);
}
-int cfi_read_intel_pri_ext(flash_bank_t *bank)
+static int cfi_read_intel_pri_ext(flash_bank_t *bank)
{
int retval;
cfi_flash_bank_t *cfi_info = bank->driver_priv;
return ERROR_OK;
}
-int cfi_read_spansion_pri_ext(flash_bank_t *bank)
+static int cfi_read_spansion_pri_ext(flash_bank_t *bank)
{
int retval;
cfi_flash_bank_t *cfi_info = bank->driver_priv;
return ERROR_OK;
}
-int cfi_read_atmel_pri_ext(flash_bank_t *bank)
+static int cfi_read_atmel_pri_ext(flash_bank_t *bank)
{
int retval;
cfi_atmel_pri_ext_t atmel_pri_ext;
return ERROR_OK;
}
-int cfi_read_0002_pri_ext(flash_bank_t *bank)
+static int cfi_read_0002_pri_ext(flash_bank_t *bank)
{
cfi_flash_bank_t *cfi_info = bank->driver_priv;
}
}
-int cfi_spansion_info(struct flash_bank_s *bank, char *buf, int buf_size)
+static int cfi_spansion_info(struct flash_bank_s *bank, char *buf, int buf_size)
{
int printed;
cfi_flash_bank_t *cfi_info = bank->driver_priv;
return ERROR_OK;
}
-int cfi_intel_info(struct flash_bank_s *bank, char *buf, int buf_size)
+static int cfi_intel_info(struct flash_bank_s *bank, char *buf, int buf_size)
{
int printed;
cfi_flash_bank_t *cfi_info = bank->driver_priv;
return ERROR_OK;
}
-int cfi_register_commands(struct command_context_s *cmd_ctx)
+static int cfi_register_commands(struct command_context_s *cmd_ctx)
{
/*command_t *cfi_cmd = */
register_command(cmd_ctx, NULL, "cfi", NULL, COMMAND_ANY, "flash bank cfi <base> <size> <chip_width> <bus_width> <targetNum> [jedec_probe/x16_as_x8]");
/* flash_bank cfi <base> <size> <chip_width> <bus_width> <target#> [options]
*/
-int cfi_flash_bank_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc, struct flash_bank_s *bank)
+static int cfi_flash_bank_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc, struct flash_bank_s *bank)
{
cfi_flash_bank_t *cfi_info;
int i;
return ERROR_OK;
}
-int cfi_intel_erase(struct flash_bank_s *bank, int first, int last)
+static int cfi_intel_erase(struct flash_bank_s *bank, int first, int last)
{
int retval;
cfi_flash_bank_t *cfi_info = bank->driver_priv;
}
-int cfi_spansion_erase(struct flash_bank_s *bank, int first, int last)
+static int cfi_spansion_erase(struct flash_bank_s *bank, int first, int last)
{
int retval;
cfi_flash_bank_t *cfi_info = bank->driver_priv;
return target->type->write_memory(target, flash_address(bank, 0, 0x0), bank->bus_width, 1, command);
}
-int cfi_erase(struct flash_bank_s *bank, int first, int last)
+static int cfi_erase(struct flash_bank_s *bank, int first, int last)
{
cfi_flash_bank_t *cfi_info = bank->driver_priv;
return ERROR_OK;
}
-int cfi_intel_protect(struct flash_bank_s *bank, int set, int first, int last)
+static int cfi_intel_protect(struct flash_bank_s *bank, int set, int first, int last)
{
int retval;
cfi_flash_bank_t *cfi_info = bank->driver_priv;
return target->type->write_memory(target, flash_address(bank, 0, 0x0), bank->bus_width, 1, command);
}
-int cfi_protect(struct flash_bank_s *bank, int set, int first, int last)
+static int cfi_protect(struct flash_bank_s *bank, int set, int first, int last)
{
cfi_flash_bank_t *cfi_info = bank->driver_priv;
}
}
-u32 cfi_command_val(flash_bank_t *bank, u8 cmd)
+static u32 cfi_command_val(flash_bank_t *bank, u8 cmd)
{
target_t *target = bank->target;
}
}
-int cfi_intel_write_block(struct flash_bank_s *bank, u8 *buffer, u32 address, u32 count)
+static int cfi_intel_write_block(struct flash_bank_s *bank, u8 *buffer, u32 address, u32 count)
{
cfi_flash_bank_t *cfi_info = bank->driver_priv;
target_t *target = bank->target;
return retval;
}
-int cfi_spansion_write_block(struct flash_bank_s *bank, u8 *buffer, u32 address, u32 count)
+static int cfi_spansion_write_block(struct flash_bank_s *bank, u8 *buffer, u32 address, u32 count)
{
cfi_flash_bank_t *cfi_info = bank->driver_priv;
cfi_spansion_pri_ext_t *pri_ext = cfi_info->pri_ext;
return exit_code;
}
-int cfi_intel_write_word(struct flash_bank_s *bank, u8 *word, u32 address)
+static int cfi_intel_write_word(struct flash_bank_s *bank, u8 *word, u32 address)
{
int retval;
cfi_flash_bank_t *cfi_info = bank->driver_priv;
return ERROR_OK;
}
-int cfi_intel_write_words(struct flash_bank_s *bank, u8 *word, u32 wordcount, u32 address)
+static int cfi_intel_write_words(struct flash_bank_s *bank, u8 *word, u32 wordcount, u32 address)
{
int retval;
cfi_flash_bank_t *cfi_info = bank->driver_priv;
return ERROR_OK;
}
-int cfi_spansion_write_word(struct flash_bank_s *bank, u8 *word, u32 address)
+static int cfi_spansion_write_word(struct flash_bank_s *bank, u8 *word, u32 address)
{
int retval;
cfi_flash_bank_t *cfi_info = bank->driver_priv;
return ERROR_OK;
}
-int cfi_spansion_write_words(struct flash_bank_s *bank, u8 *word, u32 wordcount, u32 address)
+static int cfi_spansion_write_words(struct flash_bank_s *bank, u8 *word, u32 wordcount, u32 address)
{
int retval;
cfi_flash_bank_t *cfi_info = bank->driver_priv;
return ERROR_OK;
}
-int cfi_write_word(struct flash_bank_s *bank, u8 *word, u32 address)
+static int cfi_write_word(struct flash_bank_s *bank, u8 *word, u32 address)
{
cfi_flash_bank_t *cfi_info = bank->driver_priv;
return ERROR_FLASH_OPERATION_FAILED;
}
-int cfi_write_words(struct flash_bank_s *bank, u8 *word, u32 wordcount, u32 address)
+static int cfi_write_words(struct flash_bank_s *bank, u8 *word, u32 wordcount, u32 address)
{
cfi_flash_bank_t *cfi_info = bank->driver_priv;
return target->type->write_memory(target, flash_address(bank, 0, 0x0), bank->bus_width, 1, current_word);
}
-void cfi_fixup_atmel_reversed_erase_regions(flash_bank_t *bank, void *param)
+static void cfi_fixup_atmel_reversed_erase_regions(flash_bank_t *bank, void *param)
{
cfi_flash_bank_t *cfi_info = bank->driver_priv;
cfi_spansion_pri_ext_t *pri_ext = cfi_info->pri_ext;
pri_ext->_reversed_geometry = 1;
}
-void cfi_fixup_0002_erase_regions(flash_bank_t *bank, void *param)
+static void cfi_fixup_0002_erase_regions(flash_bank_t *bank, void *param)
{
int i;
cfi_flash_bank_t *cfi_info = bank->driver_priv;
}
}
-void cfi_fixup_0002_unlock_addresses(flash_bank_t *bank, void *param)
+static void cfi_fixup_0002_unlock_addresses(flash_bank_t *bank, void *param)
{
cfi_flash_bank_t *cfi_info = bank->driver_priv;
cfi_spansion_pri_ext_t *pri_ext = cfi_info->pri_ext;
pri_ext->_unlock2 = unlock_addresses->unlock2;
}
-int cfi_probe(struct flash_bank_s *bank)
+static int cfi_probe(struct flash_bank_s *bank)
{
cfi_flash_bank_t *cfi_info = bank->driver_priv;
target_t *target = bank->target;
return ERROR_OK;
}
-int cfi_auto_probe(struct flash_bank_s *bank)
+static int cfi_auto_probe(struct flash_bank_s *bank)
{
cfi_flash_bank_t *cfi_info = bank->driver_priv;
if (cfi_info->probed)
}
-int cfi_intel_protect_check(struct flash_bank_s *bank)
+static int cfi_intel_protect_check(struct flash_bank_s *bank)
{
int retval;
cfi_flash_bank_t *cfi_info = bank->driver_priv;
return target->type->write_memory(target, flash_address(bank, 0, 0x0), bank->bus_width, 1, command);
}
-int cfi_spansion_protect_check(struct flash_bank_s *bank)
+static int cfi_spansion_protect_check(struct flash_bank_s *bank)
{
int retval;
cfi_flash_bank_t *cfi_info = bank->driver_priv;
return target->type->write_memory(target, flash_address(bank, 0, 0x0), bank->bus_width, 1, command);
}
-int cfi_protect_check(struct flash_bank_s *bank)
+static int cfi_protect_check(struct flash_bank_s *bank)
{
cfi_flash_bank_t *cfi_info = bank->driver_priv;
return ERROR_OK;
}
-int cfi_info(struct flash_bank_s *bank, char *buf, int buf_size)
+static int cfi_info(struct flash_bank_s *bank, char *buf, int buf_size)
{
int printed;
cfi_flash_bank_t *cfi_info = bank->driver_priv;
#include "../target/embeddedice.h"
#include "types.h"
-int ecosflash_register_commands(struct command_context_s *cmd_ctx);
-int ecosflash_flash_bank_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc, struct flash_bank_s *bank);
-int ecosflash_erase(struct flash_bank_s *bank, int first, int last);
-int ecosflash_protect(struct flash_bank_s *bank, int set, int first, int last);
-int ecosflash_write(struct flash_bank_s *bank, u8 *buffer, u32 offset, u32 count);
-int ecosflash_probe(struct flash_bank_s *bank);
-int ecosflash_protect_check(struct flash_bank_s *bank);
-int ecosflash_info(struct flash_bank_s *bank, char *buf, int buf_size);
-
-u32 ecosflash_get_flash_status(flash_bank_t *bank);
-void ecosflash_set_flash_mode(flash_bank_t *bank,int mode);
-u32 ecosflash_wait_status_busy(flash_bank_t *bank, u32 waitbits, int timeout);
-int ecosflash_handle_gpnvm_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc);
+static int ecosflash_register_commands(struct command_context_s *cmd_ctx);
+static int ecosflash_flash_bank_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc, struct flash_bank_s *bank);
+static int ecosflash_erase(struct flash_bank_s *bank, int first, int last);
+static int ecosflash_protect(struct flash_bank_s *bank, int set, int first, int last);
+static int ecosflash_write(struct flash_bank_s *bank, u8 *buffer, u32 offset, u32 count);
+static int ecosflash_probe(struct flash_bank_s *bank);
+static int ecosflash_protect_check(struct flash_bank_s *bank);
+static int ecosflash_info(struct flash_bank_s *bank, char *buf, int buf_size);
+
+#if 0
+static u32 ecosflash_get_flash_status(flash_bank_t *bank);
+static void ecosflash_set_flash_mode(flash_bank_t *bank,int mode);
+static u32 ecosflash_wait_status_busy(flash_bank_t *bank, u32 waitbits, int timeout);
+static int ecosflash_handle_gpnvm_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc);
+#endif
flash_driver_t ecosflash_flash =
{
/* flash bank ecosflash <base> <size> <chip_width> <bus_width> <target#> <driverPath>
*/
-int ecosflash_flash_bank_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc, struct flash_bank_s *bank)
+static int ecosflash_flash_bank_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc, struct flash_bank_s *bank)
{
ecosflash_flash_bank_t *info;
return ERROR_OK;
}
-int loadDriver(ecosflash_flash_bank_t *info)
+static int loadDriver(ecosflash_flash_bank_t *info)
{
u32 buf_cnt;
u32 image_size;
static int const OFFSET_GET_WORKAREA=0x18;
static int const OFFSET_GET_WORKAREA_SIZE=0x4;
-int runCode(ecosflash_flash_bank_t *info,
+static int runCode(ecosflash_flash_bank_t *info,
u32 codeStart, u32 codeStop, u32 r0, u32 r1, u32 r2,
u32 *result,
/* timeout in ms */
return ERROR_OK;
}
-int eCosBoard_erase(ecosflash_flash_bank_t *info, u32 address, u32 len)
+static int eCosBoard_erase(ecosflash_flash_bank_t *info, u32 address, u32 len)
{
int retval;
int timeout = (len / 20480 + 1) * 1000; /*asume 20 KB/s*/
return ERROR_OK;
}
-int eCosBoard_flash(ecosflash_flash_bank_t *info, void *data, u32 address, u32 len)
+static int eCosBoard_flash(ecosflash_flash_bank_t *info, void *data, u32 address, u32 len)
{
target_t *target=info->target;
const int chunk=8192;
return ERROR_OK;
}
-int ecosflash_probe(struct flash_bank_s *bank)
+static int ecosflash_probe(struct flash_bank_s *bank)
{
return ERROR_OK;
}
-int ecosflash_register_commands(struct command_context_s *cmd_ctx)
+static int ecosflash_register_commands(struct command_context_s *cmd_ctx)
{
register_command(cmd_ctx, NULL, "ecosflash", NULL, COMMAND_ANY, NULL);
}
#endif
-u32 ecosflash_address(struct flash_bank_s *bank, u32 address)
+#if 0
+static u32 ecosflash_address(struct flash_bank_s *bank, u32 address)
{
u32 retval = 0;
switch(bank->bus_width)
return retval + bank->base;
}
+#endif
-int ecosflash_erase(struct flash_bank_s *bank, int first, int last)
+static int ecosflash_erase(struct flash_bank_s *bank, int first, int last)
{
struct flash_bank_s *c=bank;
ecosflash_flash_bank_t *info = bank->driver_priv;
return eCosBoard_erase(info, c->base+first*sectorSize, sectorSize*(last-first+1));
}
-int ecosflash_protect(struct flash_bank_s *bank, int set, int first, int last)
+static int ecosflash_protect(struct flash_bank_s *bank, int set, int first, int last)
{
return ERROR_OK;
}
-int ecosflash_write(struct flash_bank_s *bank, u8 *buffer, u32 offset, u32 count)
+static int ecosflash_write(struct flash_bank_s *bank, u8 *buffer, u32 offset, u32 count)
{
ecosflash_flash_bank_t *info = bank->driver_priv;
struct flash_bank_s *c=bank;
return eCosBoard_flash(info, buffer, c->base+offset, count);
}
-int ecosflash_protect_check(struct flash_bank_s *bank)
+static int ecosflash_protect_check(struct flash_bank_s *bank)
{
return ERROR_OK;
}
-int ecosflash_info(struct flash_bank_s *bank, char *buf, int buf_size)
+static int ecosflash_info(struct flash_bank_s *bank, char *buf, int buf_size)
{
ecosflash_flash_bank_t *info = bank->driver_priv;
snprintf(buf, buf_size, "eCos flash driver: %s", info->driverPath);
return ERROR_OK;
}
-u32 ecosflash_get_flash_status(flash_bank_t *bank)
+#if 0
+static u32 ecosflash_get_flash_status(flash_bank_t *bank)
{
return ERROR_OK;
}
-void ecosflash_set_flash_mode(flash_bank_t *bank,int mode)
+static void ecosflash_set_flash_mode(flash_bank_t *bank,int mode)
{
}
-u32 ecosflash_wait_status_busy(flash_bank_t *bank, u32 waitbits, int timeout)
+static u32 ecosflash_wait_status_busy(flash_bank_t *bank, u32 waitbits, int timeout)
{
return ERROR_OK;
}
-int ecosflash_handle_gpnvm_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc)
+static int ecosflash_handle_gpnvm_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc)
{
return ERROR_OK;
}
+#endif
#include <inttypes.h>
/* command handlers */
-int handle_flash_bank_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc);
-int handle_flash_info_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc);
-int handle_flash_probe_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc);
-int handle_flash_erase_check_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc);
-int handle_flash_erase_address_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc);
-int handle_flash_protect_check_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc);
-int handle_flash_erase_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc);
-int handle_flash_write_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc);
-int handle_flash_write_bank_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc);
-int handle_flash_write_image_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc);
-int handle_flash_fill_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc);
-int handle_flash_protect_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc);
-flash_bank_t *get_flash_bank_by_addr(target_t *target, u32 addr);
+static int handle_flash_bank_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc);
+static int handle_flash_info_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc);
+static int handle_flash_probe_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc);
+static int handle_flash_erase_check_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc);
+static int handle_flash_erase_address_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc);
+static int handle_flash_protect_check_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc);
+static int handle_flash_erase_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc);
+static int handle_flash_write_bank_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc);
+static int handle_flash_write_image_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc);
+static int handle_flash_fill_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc);
+static int handle_flash_protect_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc);
/* flash drivers
*/
return p;
}
-int handle_flash_bank_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc)
+static int handle_flash_bank_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc)
{
int retval;
int i;
return ERROR_OK;
}
-int handle_flash_info_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc)
+static int handle_flash_info_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc)
{
flash_bank_t *p;
int i = 0;
return ERROR_OK;
}
-int handle_flash_probe_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc)
+static int handle_flash_probe_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc)
{
flash_bank_t *p;
int retval;
return ERROR_OK;
}
-int handle_flash_erase_check_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc)
+static int handle_flash_erase_check_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc)
{
flash_bank_t *p;
int retval;
return ERROR_OK;
}
-int handle_flash_erase_address_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc)
+static int handle_flash_erase_address_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc)
{
flash_bank_t *p;
int retval;
return retval;
}
-int handle_flash_protect_check_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc)
+static int handle_flash_protect_check_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc)
{
flash_bank_t *p;
int retval;
return ERROR_OK;
}
-int handle_flash_erase_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc)
+static int handle_flash_erase_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc)
{
if (argc > 2)
{
return ERROR_OK;
}
-int handle_flash_protect_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc)
+static int handle_flash_protect_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc)
{
if (argc > 3)
{
return ERROR_OK;
}
-int handle_flash_write_image_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc)
+static int handle_flash_write_image_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc)
{
target_t *target = get_current_target(cmd_ctx);
return retval;
}
-int handle_flash_fill_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc)
+static int handle_flash_fill_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc)
{
int err = ERROR_OK, retval;
u32 address;
return ERROR_OK;
}
-int handle_flash_write_bank_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc)
+static int handle_flash_write_bank_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc)
{
u32 offset;
u8 *buffer;
* - 2378
*/
-int lpc2000_register_commands(struct command_context_s *cmd_ctx);
-int lpc2000_flash_bank_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc, struct flash_bank_s *bank);
-int lpc2000_erase(struct flash_bank_s *bank, int first, int last);
-int lpc2000_protect(struct flash_bank_s *bank, int set, int first, int last);
-int lpc2000_write(struct flash_bank_s *bank, u8 *buffer, u32 offset, u32 count);
-int lpc2000_probe(struct flash_bank_s *bank);
-int lpc2000_erase_check(struct flash_bank_s *bank);
-int lpc2000_protect_check(struct flash_bank_s *bank);
-int lpc2000_info(struct flash_bank_s *bank, char *buf, int buf_size);
-
-int lpc2000_handle_part_id_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc);
+static int lpc2000_register_commands(struct command_context_s *cmd_ctx);
+static int lpc2000_flash_bank_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc, struct flash_bank_s *bank);
+static int lpc2000_erase(struct flash_bank_s *bank, int first, int last);
+static int lpc2000_protect(struct flash_bank_s *bank, int set, int first, int last);
+static int lpc2000_write(struct flash_bank_s *bank, u8 *buffer, u32 offset, u32 count);
+static int lpc2000_probe(struct flash_bank_s *bank);
+static int lpc2000_erase_check(struct flash_bank_s *bank);
+static int lpc2000_protect_check(struct flash_bank_s *bank);
+static int lpc2000_info(struct flash_bank_s *bank, char *buf, int buf_size);
+
+static int lpc2000_handle_part_id_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc);
flash_driver_t lpc2000_flash =
{
.info = lpc2000_info
};
-int lpc2000_register_commands(struct command_context_s *cmd_ctx)
+static int lpc2000_register_commands(struct command_context_s *cmd_ctx)
{
command_t *lpc2000_cmd = register_command(cmd_ctx, NULL, "lpc2000", NULL, COMMAND_ANY, NULL);
return ERROR_OK;
}
-int lpc2000_build_sector_list(struct flash_bank_s *bank)
+static int lpc2000_build_sector_list(struct flash_bank_s *bank)
{
lpc2000_flash_bank_t *lpc2000_info = bank->driver_priv;
* 0x20 to 0x2b: command result table
* 0x2c to 0xac: stack (only 128b needed)
*/
-int lpc2000_iap_call(flash_bank_t *bank, int code, u32 param_table[5], u32 result_table[2])
+static int lpc2000_iap_call(flash_bank_t *bank, int code, u32 param_table[5], u32 result_table[2])
{
int retval;
lpc2000_flash_bank_t *lpc2000_info = bank->driver_priv;
return status_code;
}
-int lpc2000_iap_blank_check(struct flash_bank_s *bank, int first, int last)
+static int lpc2000_iap_blank_check(struct flash_bank_s *bank, int first, int last)
{
u32 param_table[5];
u32 result_table[2];
int status_code;
int i;
- if ((first < 0) || (last > bank->num_sectors))
+ if ((first < 0) || (last >= bank->num_sectors))
return ERROR_FLASH_SECTOR_INVALID;
for (i = first; i <= last; i++)
/* flash bank lpc2000 <base> <size> 0 0 <target#> <lpc_variant> <cclk> [calc_checksum]
*/
-int lpc2000_flash_bank_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc, struct flash_bank_s *bank)
+static int lpc2000_flash_bank_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc, struct flash_bank_s *bank)
{
lpc2000_flash_bank_t *lpc2000_info;
return ERROR_OK;
}
-int lpc2000_erase(struct flash_bank_s *bank, int first, int last)
+static int lpc2000_erase(struct flash_bank_s *bank, int first, int last)
{
lpc2000_flash_bank_t *lpc2000_info = bank->driver_priv;
u32 param_table[5];
return ERROR_OK;
}
-int lpc2000_protect(struct flash_bank_s *bank, int set, int first, int last)
+static int lpc2000_protect(struct flash_bank_s *bank, int set, int first, int last)
{
/* can't protect/unprotect on the lpc2000 */
return ERROR_OK;
}
-int lpc2000_write(struct flash_bank_s *bank, u8 *buffer, u32 offset, u32 count)
+static int lpc2000_write(struct flash_bank_s *bank, u8 *buffer, u32 offset, u32 count)
{
lpc2000_flash_bank_t *lpc2000_info = bank->driver_priv;
target_t *target = bank->target;
return retval;
}
-int lpc2000_probe(struct flash_bank_s *bank)
+static int lpc2000_probe(struct flash_bank_s *bank)
{
/* we can't probe on an lpc2000
* if this is an lpc2xxx, it has the configured flash
return ERROR_OK;
}
-int lpc2000_erase_check(struct flash_bank_s *bank)
+static int lpc2000_erase_check(struct flash_bank_s *bank)
{
if (bank->target->state != TARGET_HALTED)
{
return lpc2000_iap_blank_check(bank, 0, bank->num_sectors - 1);
}
-int lpc2000_protect_check(struct flash_bank_s *bank)
+static int lpc2000_protect_check(struct flash_bank_s *bank)
{
/* sectors are always protected */
return ERROR_OK;
}
-int lpc2000_info(struct flash_bank_s *bank, char *buf, int buf_size)
+static int lpc2000_info(struct flash_bank_s *bank, char *buf, int buf_size)
{
lpc2000_flash_bank_t *lpc2000_info = bank->driver_priv;
return ERROR_OK;
}
-int lpc2000_handle_part_id_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc)
+static int lpc2000_handle_part_id_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc)
{
flash_bank_t *bank;
u32 param_table[5];
/* F_CLK_TIME */
#define FCT_CLK_DIV_MASK 0x0FFF
-int lpc288x_register_commands(struct command_context_s *cmd_ctx);
-int lpc288x_flash_bank_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc, struct flash_bank_s *bank);
-int lpc288x_erase(struct flash_bank_s *bank, int first, int last);
-int lpc288x_protect(struct flash_bank_s *bank, int set, int first, int last);
-int lpc288x_write(struct flash_bank_s *bank, u8 *buffer, u32 offset, u32 count);
-int lpc288x_probe(struct flash_bank_s *bank);
-int lpc288x_auto_probe(struct flash_bank_s *bank);
-int lpc288x_erase_check(struct flash_bank_s *bank);
-int lpc288x_protect_check(struct flash_bank_s *bank);
-int lpc288x_info(struct flash_bank_s *bank, char *buf, int buf_size);
-void lpc288x_set_flash_mode(flash_bank_t *bank, u8 flashplane, int mode);
-u32 lpc288x_wait_status_busy(flash_bank_t *bank, int timeout);
-void lpc288x_load_timer(int erase, struct target_s *target);
-void lpc288x_set_flash_clk(struct flash_bank_s *bank);
-u32 lpc288x_system_ready(struct flash_bank_s *bank);
-int lpc288x_handle_part_id_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc);
+static int lpc288x_register_commands(struct command_context_s *cmd_ctx);
+static int lpc288x_flash_bank_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc, struct flash_bank_s *bank);
+static int lpc288x_erase(struct flash_bank_s *bank, int first, int last);
+static int lpc288x_protect(struct flash_bank_s *bank, int set, int first, int last);
+static int lpc288x_write(struct flash_bank_s *bank, u8 *buffer, u32 offset, u32 count);
+static int lpc288x_probe(struct flash_bank_s *bank);
+static int lpc288x_erase_check(struct flash_bank_s *bank);
+static int lpc288x_protect_check(struct flash_bank_s *bank);
+static int lpc288x_info(struct flash_bank_s *bank, char *buf, int buf_size);
+static u32 lpc288x_wait_status_busy(flash_bank_t *bank, int timeout);
+static void lpc288x_load_timer(int erase, struct target_s *target);
+static void lpc288x_set_flash_clk(struct flash_bank_s *bank);
+static u32 lpc288x_system_ready(struct flash_bank_s *bank);
flash_driver_t lpc288x_flash =
{
.info = lpc288x_info
};
-int lpc288x_register_commands(struct command_context_s *cmd_ctx)
+static int lpc288x_register_commands(struct command_context_s *cmd_ctx)
{
return ERROR_OK;
}
-u32 lpc288x_wait_status_busy(flash_bank_t *bank, int timeout)
+static u32 lpc288x_wait_status_busy(flash_bank_t *bank, int timeout)
{
u32 status;
target_t *target = bank->target;
}
/* Read device id register and fill in driver info structure */
-int lpc288x_read_part_info(struct flash_bank_s *bank)
+static int lpc288x_read_part_info(struct flash_bank_s *bank)
{
lpc288x_flash_bank_t *lpc288x_info = bank->driver_priv;
target_t *target = bank->target;
return ERROR_OK;
}
-int lpc288x_protect_check(struct flash_bank_s *bank)
+static int lpc288x_protect_check(struct flash_bank_s *bank)
{
return ERROR_OK;
}
/* flash_bank LPC288x 0 0 0 0 <target#> <cclk> */
-int lpc288x_flash_bank_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc, struct flash_bank_s *bank)
+static int lpc288x_flash_bank_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc, struct flash_bank_s *bank)
{
lpc288x_flash_bank_t *lpc288x_info;
* AHB = 12 MHz ?
* 12000000/66000 = 182
* CLK_DIV = 60 ? */
-void lpc288x_set_flash_clk(struct flash_bank_s *bank)
+static void lpc288x_set_flash_clk(struct flash_bank_s *bank)
{
u32 clk_time;
lpc288x_flash_bank_t *lpc288x_info = bank->driver_priv;
* LOAD_TIMER_WRITE FPT_TIME = ((1,000,000 / AHB tcyc (in ns)) - 2) / 512
* = 23 (75) (AN10548 72 - is this wrong?)
* TODO: Sort out timing calcs ;) */
-void lpc288x_load_timer(int erase, struct target_s *target)
+static void lpc288x_load_timer(int erase, struct target_s *target)
{
if (erase == LOAD_TIMER_ERASE)
{
}
}
-u32 lpc288x_system_ready(struct flash_bank_s *bank)
+static u32 lpc288x_system_ready(struct flash_bank_s *bank)
{
lpc288x_flash_bank_t *lpc288x_info = bank->driver_priv;
if (lpc288x_info->cidr == 0)
return ERROR_OK;
}
-int lpc288x_erase_check(struct flash_bank_s *bank)
+static int lpc288x_erase_check(struct flash_bank_s *bank)
{
u32 status = lpc288x_system_ready(bank); /* probed? halted? */
if (status != ERROR_OK)
return ERROR_OK;
}
-int lpc288x_erase(struct flash_bank_s *bank, int first, int last)
+static int lpc288x_erase(struct flash_bank_s *bank, int first, int last)
{
u32 status;
int sector;
return ERROR_OK;
}
-int lpc288x_write(struct flash_bank_s *bank, u8 *buffer, u32 offset, u32 count)
+static int lpc288x_write(struct flash_bank_s *bank, u8 *buffer, u32 offset, u32 count)
{
u8 page_buffer[FLASH_PAGE_SIZE];
u32 i, status, source_offset,dest_offset;
return ERROR_OK;
}
-int lpc288x_probe(struct flash_bank_s *bank)
+static int lpc288x_probe(struct flash_bank_s *bank)
{
/* we only deal with LPC2888 so flash config is fixed */
lpc288x_flash_bank_t *lpc288x_info = bank->driver_priv;
return ERROR_OK;
}
-int lpc288x_info(struct flash_bank_s *bank, char *buf, int buf_size)
+static int lpc288x_info(struct flash_bank_s *bank, char *buf, int buf_size)
{
snprintf(buf, buf_size, "lpc288x flash driver");
return ERROR_OK;
}
-int lpc288x_protect(struct flash_bank_s *bank, int set, int first, int last)
+static int lpc288x_protect(struct flash_bank_s *bank, int set, int first, int last)
{
int lockregion, status;
u32 value;
#include "nand.h"
#include "target.h"
-int lpc3180_nand_device_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc, struct nand_device_s *device);
-int lpc3180_register_commands(struct command_context_s *cmd_ctx);
-int lpc3180_init(struct nand_device_s *device);
-int lpc3180_reset(struct nand_device_s *device);
-int lpc3180_command(struct nand_device_s *device, u8 command);
-int lpc3180_address(struct nand_device_s *device, u8 address);
-int lpc3180_write_data(struct nand_device_s *device, u16 data);
-int lpc3180_read_data(struct nand_device_s *device, void *data);
-int lpc3180_write_page(struct nand_device_s *device, u32 page, u8 *data, u32 data_size, u8 *oob, u32 oob_size);
-int lpc3180_read_page(struct nand_device_s *device, u32 page, u8 *data, u32 data_size, u8 *oob, u32 oob_size);
-int lpc3180_controller_ready(struct nand_device_s *device, int timeout);
-int lpc3180_nand_ready(struct nand_device_s *device, int timeout);
-
-int handle_lpc3180_select_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc);
+static int lpc3180_nand_device_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc, struct nand_device_s *device);
+static int lpc3180_register_commands(struct command_context_s *cmd_ctx);
+static int lpc3180_init(struct nand_device_s *device);
+static int lpc3180_reset(struct nand_device_s *device);
+static int lpc3180_command(struct nand_device_s *device, u8 command);
+static int lpc3180_address(struct nand_device_s *device, u8 address);
+static int lpc3180_write_data(struct nand_device_s *device, u16 data);
+static int lpc3180_read_data(struct nand_device_s *device, void *data);
+static int lpc3180_write_page(struct nand_device_s *device, u32 page, u8 *data, u32 data_size, u8 *oob, u32 oob_size);
+static int lpc3180_read_page(struct nand_device_s *device, u32 page, u8 *data, u32 data_size, u8 *oob, u32 oob_size);
+static int lpc3180_controller_ready(struct nand_device_s *device, int timeout);
+static int lpc3180_nand_ready(struct nand_device_s *device, int timeout);
+
+static int handle_lpc3180_select_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc);
nand_flash_controller_t lpc3180_nand_controller =
{
/* nand device lpc3180 <target#> <oscillator_frequency>
*/
-int lpc3180_nand_device_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc, struct nand_device_s *device)
+static int lpc3180_nand_device_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc, struct nand_device_s *device)
{
lpc3180_nand_controller_t *lpc3180_info;
return ERROR_OK;
}
-int lpc3180_register_commands(struct command_context_s *cmd_ctx)
+static int lpc3180_register_commands(struct command_context_s *cmd_ctx)
{
command_t *lpc3180_cmd = register_command(cmd_ctx, NULL, "lpc3180", NULL, COMMAND_ANY, "commands specific to the LPC3180 NAND flash controllers");
return ERROR_OK;
}
-int lpc3180_pll(int fclkin, u32 pll_ctrl)
+static int lpc3180_pll(int fclkin, u32 pll_ctrl)
{
int bypass = (pll_ctrl & 0x8000) >> 15;
int direct = (pll_ctrl & 0x4000) >> 14;
return (m / (2 * p)) * (fclkin / n);
}
-float lpc3180_cycle_time(lpc3180_nand_controller_t *lpc3180_info)
+static float lpc3180_cycle_time(lpc3180_nand_controller_t *lpc3180_info)
{
target_t *target = lpc3180_info->target;
u32 sysclk_ctrl, pwr_ctrl, hclkdiv_ctrl, hclkpll_ctrl;
return cycle;
}
-int lpc3180_init(struct nand_device_s *device)
+static int lpc3180_init(struct nand_device_s *device)
{
lpc3180_nand_controller_t *lpc3180_info = device->controller_priv;
target_t *target = lpc3180_info->target;
return ERROR_OK;
}
-int lpc3180_reset(struct nand_device_s *device)
+static int lpc3180_reset(struct nand_device_s *device)
{
lpc3180_nand_controller_t *lpc3180_info = device->controller_priv;
target_t *target = lpc3180_info->target;
return ERROR_OK;
}
-int lpc3180_command(struct nand_device_s *device, u8 command)
+static int lpc3180_command(struct nand_device_s *device, u8 command)
{
lpc3180_nand_controller_t *lpc3180_info = device->controller_priv;
target_t *target = lpc3180_info->target;
return ERROR_OK;
}
-int lpc3180_address(struct nand_device_s *device, u8 address)
+static int lpc3180_address(struct nand_device_s *device, u8 address)
{
lpc3180_nand_controller_t *lpc3180_info = device->controller_priv;
target_t *target = lpc3180_info->target;
return ERROR_OK;
}
-int lpc3180_write_data(struct nand_device_s *device, u16 data)
+static int lpc3180_write_data(struct nand_device_s *device, u16 data)
{
lpc3180_nand_controller_t *lpc3180_info = device->controller_priv;
target_t *target = lpc3180_info->target;
return ERROR_OK;
}
-int lpc3180_read_data(struct nand_device_s *device, void *data)
+static int lpc3180_read_data(struct nand_device_s *device, void *data)
{
lpc3180_nand_controller_t *lpc3180_info = device->controller_priv;
target_t *target = lpc3180_info->target;
return ERROR_OK;
}
-int lpc3180_write_page(struct nand_device_s *device, u32 page, u8 *data, u32 data_size, u8 *oob, u32 oob_size)
+static int lpc3180_write_page(struct nand_device_s *device, u32 page, u8 *data, u32 data_size, u8 *oob, u32 oob_size)
{
lpc3180_nand_controller_t *lpc3180_info = device->controller_priv;
target_t *target = lpc3180_info->target;
return ERROR_OK;
}
-int lpc3180_read_page(struct nand_device_s *device, u32 page, u8 *data, u32 data_size, u8 *oob, u32 oob_size)
+static int lpc3180_read_page(struct nand_device_s *device, u32 page, u8 *data, u32 data_size, u8 *oob, u32 oob_size)
{
lpc3180_nand_controller_t *lpc3180_info = device->controller_priv;
target_t *target = lpc3180_info->target;
return ERROR_OK;
}
-int lpc3180_controller_ready(struct nand_device_s *device, int timeout)
+static int lpc3180_controller_ready(struct nand_device_s *device, int timeout)
{
lpc3180_nand_controller_t *lpc3180_info = device->controller_priv;
target_t *target = lpc3180_info->target;
return 0;
}
-int lpc3180_nand_ready(struct nand_device_s *device, int timeout)
+static int lpc3180_nand_ready(struct nand_device_s *device, int timeout)
{
lpc3180_nand_controller_t *lpc3180_info = device->controller_priv;
target_t *target = lpc3180_info->target;
return 0;
}
-int handle_lpc3180_select_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc)
+static int handle_lpc3180_select_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc)
{
nand_device_t *device = NULL;
lpc3180_nand_controller_t *lpc3180_info = NULL;
#include "fileio.h"
#include "image.h"
-int nand_register_commands(struct command_context_s *cmd_ctx);
-int handle_nand_list_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc);
-int handle_nand_probe_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc);
-int handle_nand_check_bad_blocks_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc);
-int handle_nand_info_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc);
-int handle_nand_copy_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc);
-int handle_nand_write_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc);
-int handle_nand_dump_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc);
-int handle_nand_erase_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc);
+static int handle_nand_list_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc);
+static int handle_nand_probe_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc);
+static int handle_nand_check_bad_blocks_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc);
+static int handle_nand_info_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc);
+static int handle_nand_copy_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc);
+static int handle_nand_write_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc);
+static int handle_nand_dump_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc);
+static int handle_nand_erase_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc);
-int handle_nand_raw_access_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc);
+static int handle_nand_raw_access_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc);
-int nand_read_page_raw(struct nand_device_s *device, u32 page, u8 *data, u32 data_size, u8 *oob, u32 oob_size);
-int nand_read_page(struct nand_device_s *device, u32 page, u8 *data, u32 data_size, u8 *oob, u32 oob_size);
-int nand_read_plain(struct nand_device_s *device, u32 address, u8 *data, u32 data_size);
+static int nand_read_page(struct nand_device_s *device, u32 page, u8 *data, u32 data_size, u8 *oob, u32 oob_size);
+//static int nand_read_plain(struct nand_device_s *device, u32 address, u8 *data, u32 data_size);
-int nand_write_page_raw(struct nand_device_s *device, u32 page, u8 *data, u32 data_size, u8 *oob, u32 oob_size);
-int nand_write_page(struct nand_device_s *device, u32 page, u8 *data, u32 data_size, u8 *oob, u32 oob_size);
+static int nand_write_page(struct nand_device_s *device, u32 page, u8 *data, u32 data_size, u8 *oob, u32 oob_size);
/* NAND flash controller
*/
/* extern nand_flash_controller_t boundary_scan_nand_controller; */
-nand_flash_controller_t *nand_flash_controllers[] =
+static nand_flash_controller_t *nand_flash_controllers[] =
{
&lpc3180_nand_controller,
&orion_nand_controller,
};
/* configured NAND devices and NAND Flash command handler */
-nand_device_t *nand_devices = NULL;
+static nand_device_t *nand_devices = NULL;
static command_t *nand_cmd;
/* Chip ID list
* 256 256 Byte page size
* 512 512 Byte page size
*/
-nand_info_t nand_flash_ids[] =
+static nand_info_t nand_flash_ids[] =
{
{"NAND 1MiB 5V 8-bit", 0x6e, 256, 1, 0x1000, 0},
{"NAND 2MiB 5V 8-bit", 0x64, 256, 2, 0x1000, 0},
/* Manufacturer ID list
*/
-nand_manufacturer_t nand_manuf_ids[] =
+static nand_manufacturer_t nand_manuf_ids[] =
{
{0x0, "unknown"},
{NAND_MFR_TOSHIBA, "Toshiba"},
* Define default oob placement schemes for large and small page devices
*/
-nand_ecclayout_t nand_oob_8 = {
+#if 0
+static nand_ecclayout_t nand_oob_8 = {
.eccbytes = 3,
.eccpos = {0, 1, 2},
.oobfree = {
{.offset = 6,
.length = 2}}
};
+#endif
-nand_ecclayout_t nand_oob_16 = {
+static nand_ecclayout_t nand_oob_16 = {
.eccbytes = 6,
.eccpos = {0, 1, 2, 3, 6, 7},
.oobfree = {
. length = 8}}
};
-nand_ecclayout_t nand_oob_64 = {
+static nand_ecclayout_t nand_oob_64 = {
.eccbytes = 24,
.eccpos = {
40, 41, 42, 43, 44, 45, 46, 47,
/* nand device <nand_controller> [controller options]
*/
-int handle_nand_device_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc)
+static int handle_nand_device_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc)
{
int i;
int retval;
return NULL;
}
-int nand_build_bbt(struct nand_device_s *device, int first, int last)
+static int nand_build_bbt(struct nand_device_s *device, int first, int last)
{
u32 page = 0x0;
int i;
return ERROR_OK;
}
-int nand_poll_ready(struct nand_device_s *device, int timeout)
+static int nand_poll_ready(struct nand_device_s *device, int timeout)
{
u8 status;
return ERROR_OK;
}
-int nand_read_plain(struct nand_device_s *device, u32 address, u8 *data, u32 data_size)
+#if 0
+static int nand_read_plain(struct nand_device_s *device, u32 address, u8 *data, u32 data_size)
{
u8 *page;
return ERROR_OK;
}
-int nand_write_plain(struct nand_device_s *device, u32 address, u8 *data, u32 data_size)
+static int nand_write_plain(struct nand_device_s *device, u32 address, u8 *data, u32 data_size)
{
u8 *page;
return ERROR_OK;
}
+#endif
int nand_write_page(struct nand_device_s *device, u32 page, u8 *data, u32 data_size, u8 *oob, u32 oob_size)
{
return device->controller->write_page(device, page, data, data_size, oob, oob_size);
}
-int nand_read_page(struct nand_device_s *device, u32 page, u8 *data, u32 data_size, u8 *oob, u32 oob_size)
+static int nand_read_page(struct nand_device_s *device, u32 page, u8 *data, u32 data_size, u8 *oob, u32 oob_size)
{
if (!device->device)
return ERROR_NAND_DEVICE_NOT_PROBED;
return ERROR_OK;
}
-int handle_nand_info_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc)
+static int handle_nand_info_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc)
{
nand_device_t *p;
int i = 0;
return ERROR_OK;
}
-int handle_nand_probe_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc)
+static int handle_nand_probe_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc)
{
nand_device_t *p;
int retval;
return ERROR_OK;
}
-int handle_nand_erase_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc)
+static int handle_nand_erase_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc)
{
nand_device_t *p;
int retval;
return ERROR_OK;
}
-int handle_nand_copy_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc)
+static int handle_nand_copy_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc)
{
nand_device_t *p;
return ERROR_OK;
}
-int handle_nand_write_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc)
+static int handle_nand_write_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc)
{
u32 offset;
u32 binary_size;
return ERROR_OK;
}
-int handle_nand_dump_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc)
+static int handle_nand_dump_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc)
{
nand_device_t *p;
return ERROR_OK;
}
-int handle_nand_raw_access_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc)
+static int handle_nand_raw_access_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc)
{
nand_device_t *p;
#include <string.h>
#include <unistd.h>
-int ocl_register_commands(struct command_context_s *cmd_ctx);
-int ocl_flash_bank_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc, struct flash_bank_s *bank);
-int ocl_erase(struct flash_bank_s *bank, int first, int last);
-int ocl_protect(struct flash_bank_s *bank, int set, int first, int last);
-int ocl_write(struct flash_bank_s *bank, u8 *buffer, u32 offset, u32 count);
-int ocl_probe(struct flash_bank_s *bank);
-int ocl_erase_check(struct flash_bank_s *bank);
-int ocl_protect_check(struct flash_bank_s *bank);
-int ocl_info(struct flash_bank_s *bank, char *buf, int buf_size);
-int ocl_auto_probe(struct flash_bank_s *bank);
+static int ocl_register_commands(struct command_context_s *cmd_ctx);
+static int ocl_flash_bank_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc, struct flash_bank_s *bank);
+static int ocl_erase(struct flash_bank_s *bank, int first, int last);
+static int ocl_protect(struct flash_bank_s *bank, int set, int first, int last);
+static int ocl_write(struct flash_bank_s *bank, u8 *buffer, u32 offset, u32 count);
+static int ocl_probe(struct flash_bank_s *bank);
+static int ocl_erase_check(struct flash_bank_s *bank);
+static int ocl_protect_check(struct flash_bank_s *bank);
+static int ocl_info(struct flash_bank_s *bank, char *buf, int buf_size);
+static int ocl_auto_probe(struct flash_bank_s *bank);
flash_driver_t ocl_flash =
{
int bufalign;
} ocl_priv_t;
-int ocl_register_commands(struct command_context_s *cmd_ctx)
+static int ocl_register_commands(struct command_context_s *cmd_ctx)
{
return ERROR_OK;
}
-int ocl_erase_check(struct flash_bank_s *bank)
+static int ocl_erase_check(struct flash_bank_s *bank)
{
return ERROR_OK;
}
-int ocl_protect_check(struct flash_bank_s *bank)
+static int ocl_protect_check(struct flash_bank_s *bank)
{
return ERROR_OK;
}
/* flash_bank ocl 0 0 0 0 <target#> */
-int ocl_flash_bank_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc, struct flash_bank_s *bank)
+static int ocl_flash_bank_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc, struct flash_bank_s *bank)
{
int retval;
armv4_5_common_t *armv4_5;
return ERROR_OK;
}
-int ocl_erase(struct flash_bank_s *bank, int first, int last)
+static int ocl_erase(struct flash_bank_s *bank, int first, int last)
{
ocl_priv_t *ocl = bank->driver_priv;
int retval;
return ERROR_OK;
}
-int ocl_protect(struct flash_bank_s *bank, int set, int first, int last)
+static int ocl_protect(struct flash_bank_s *bank, int set, int first, int last)
{
return ERROR_OK;
}
-int ocl_write(struct flash_bank_s *bank, u8 *buffer, u32 offset, u32 count)
+static int ocl_write(struct flash_bank_s *bank, u8 *buffer, u32 offset, u32 count)
{
ocl_priv_t *ocl = bank->driver_priv;
int retval;
return ERROR_OK;
}
-int ocl_probe(struct flash_bank_s *bank)
+static int ocl_probe(struct flash_bank_s *bank)
{
ocl_priv_t *ocl = bank->driver_priv;
int retval;
return ERROR_OK;
}
-int ocl_info(struct flash_bank_s *bank, char *buf, int buf_size)
+static int ocl_info(struct flash_bank_s *bank, char *buf, int buf_size)
{
return ERROR_OK;
}
-int ocl_auto_probe(struct flash_bank_s *bank)
+static int ocl_auto_probe(struct flash_bank_s *bank)
{
ocl_priv_t *ocl = bank->driver_priv;
} \
} while (0)
-int orion_nand_command(struct nand_device_s *device, u8 command)
+static int orion_nand_command(struct nand_device_s *device, u8 command)
{
orion_nand_controller_t *hw = device->controller_priv;
target_t *target = hw->target;
return ERROR_OK;
}
-int orion_nand_address(struct nand_device_s *device, u8 address)
+static int orion_nand_address(struct nand_device_s *device, u8 address)
{
orion_nand_controller_t *hw = device->controller_priv;
target_t *target = hw->target;
return ERROR_OK;
}
-int orion_nand_read(struct nand_device_s *device, void *data)
+static int orion_nand_read(struct nand_device_s *device, void *data)
{
orion_nand_controller_t *hw = device->controller_priv;
target_t *target = hw->target;
return ERROR_OK;
}
-int orion_nand_write(struct nand_device_s *device, u16 data)
+static int orion_nand_write(struct nand_device_s *device, u16 data)
{
orion_nand_controller_t *hw = device->controller_priv;
target_t *target = hw->target;
return ERROR_OK;
}
-int orion_nand_slow_block_write(struct nand_device_s *device, u8 *data, int size)
+static int orion_nand_slow_block_write(struct nand_device_s *device, u8 *data, int size)
{
while (size--)
orion_nand_write(device, *data++);
return ERROR_OK;
}
-int orion_nand_fast_block_write(struct nand_device_s *device, u8 *data, int size)
+static int orion_nand_fast_block_write(struct nand_device_s *device, u8 *data, int size)
{
orion_nand_controller_t *hw = device->controller_priv;
target_t *target = hw->target;
return retval;
}
-int orion_nand_reset(struct nand_device_s *device)
+static int orion_nand_reset(struct nand_device_s *device)
{
return orion_nand_command(device, NAND_CMD_RESET);
}
-int orion_nand_controller_ready(struct nand_device_s *device, int timeout)
+static int orion_nand_controller_ready(struct nand_device_s *device, int timeout)
{
return 1;
}
-int orion_nand_register_commands(struct command_context_s *cmd_ctx)
+static int orion_nand_register_commands(struct command_context_s *cmd_ctx)
{
return ERROR_OK;
}
return ERROR_OK;
}
-int orion_nand_init(struct nand_device_s *device)
+static int orion_nand_init(struct nand_device_s *device)
{
return ERROR_OK;
}
{ 0x00, NULL, 0 }
};
-int pic32mx_register_commands(struct command_context_s *cmd_ctx);
-int pic32mx_flash_bank_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc, struct flash_bank_s *bank);
-int pic32mx_erase(struct flash_bank_s *bank, int first, int last);
-int pic32mx_protect(struct flash_bank_s *bank, int set, int first, int last);
-int pic32mx_write(struct flash_bank_s *bank, u8 *buffer, u32 offset, u32 count);
-int pic32mx_write_row(struct flash_bank_s *bank, u32 address, u32 srcaddr);
-int pic32mx_write_word(struct flash_bank_s *bank, u32 address, u32 word);
-int pic32mx_probe(struct flash_bank_s *bank);
-int pic32mx_auto_probe(struct flash_bank_s *bank);
-int pic32mx_handle_part_id_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc);
-int pic32mx_protect_check(struct flash_bank_s *bank);
-int pic32mx_info(struct flash_bank_s *bank, char *buf, int buf_size);
+static int pic32mx_register_commands(struct command_context_s *cmd_ctx);
+static int pic32mx_flash_bank_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc, struct flash_bank_s *bank);
+static int pic32mx_erase(struct flash_bank_s *bank, int first, int last);
+static int pic32mx_protect(struct flash_bank_s *bank, int set, int first, int last);
+static int pic32mx_write(struct flash_bank_s *bank, u8 *buffer, u32 offset, u32 count);
+static int pic32mx_write_row(struct flash_bank_s *bank, u32 address, u32 srcaddr);
+static int pic32mx_write_word(struct flash_bank_s *bank, u32 address, u32 word);
+static int pic32mx_probe(struct flash_bank_s *bank);
+static int pic32mx_auto_probe(struct flash_bank_s *bank);
+//static int pic32mx_handle_part_id_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc);
+static int pic32mx_protect_check(struct flash_bank_s *bank);
+static int pic32mx_info(struct flash_bank_s *bank, char *buf, int buf_size);
#if 0
int pic32mx_handle_lock_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc);
int pic32mx_handle_unlock_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc);
#endif
-int pic32mx_handle_chip_erase_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc);
-int pic32mx_handle_pgm_word_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc);
-int pic32mx_chip_erase(struct flash_bank_s *bank);
+static int pic32mx_handle_chip_erase_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc);
+static int pic32mx_handle_pgm_word_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc);
+//static int pic32mx_chip_erase(struct flash_bank_s *bank);
flash_driver_t pic32mx_flash =
{
.info = pic32mx_info
};
-int pic32mx_register_commands(struct command_context_s *cmd_ctx)
+static int pic32mx_register_commands(struct command_context_s *cmd_ctx)
{
command_t *pic32mx_cmd = register_command(cmd_ctx, NULL, "pic32mx", NULL, COMMAND_ANY, "pic32mx flash specific commands");
/* flash bank pic32mx <base> <size> 0 0 <target#>
*/
-int pic32mx_flash_bank_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc, struct flash_bank_s *bank)
+static int pic32mx_flash_bank_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc, struct flash_bank_s *bank)
{
pic32mx_flash_bank_t *pic32mx_info;
return ERROR_OK;
}
-u32 pic32mx_get_flash_status(flash_bank_t *bank)
+static u32 pic32mx_get_flash_status(flash_bank_t *bank)
{
target_t *target = bank->target;
u32 status;
return status;
}
-u32 pic32mx_wait_status_busy(flash_bank_t *bank, int timeout)
+static u32 pic32mx_wait_status_busy(flash_bank_t *bank, int timeout)
{
u32 status;
return status;
}
-int pic32mx_nvm_exec(struct flash_bank_s *bank, u32 op, u32 timeout)
+static int pic32mx_nvm_exec(struct flash_bank_s *bank, u32 op, u32 timeout)
{
target_t *target = bank->target;
u32 status;
return status;
}
-int pic32mx_protect_check(struct flash_bank_s *bank)
+static int pic32mx_protect_check(struct flash_bank_s *bank)
{
target_t *target = bank->target;
return ERROR_OK;
}
-int pic32mx_erase(struct flash_bank_s *bank, int first, int last)
+static int pic32mx_erase(struct flash_bank_s *bank, int first, int last)
{
target_t *target = bank->target;
int i;
return ERROR_OK;
}
-int pic32mx_protect(struct flash_bank_s *bank, int set, int first, int last)
+static int pic32mx_protect(struct flash_bank_s *bank, int set, int first, int last)
{
pic32mx_flash_bank_t *pic32mx_info = NULL;
target_t *target = bank->target;
#endif
}
-int pic32mx_write_block(struct flash_bank_s *bank, u8 *buffer, u32 offset, u32 count)
+static int pic32mx_write_block(struct flash_bank_s *bank, u8 *buffer, u32 offset, u32 count)
{
target_t *target = bank->target;
u32 buffer_size = 512;
return retval;
}
-int pic32mx_write_word(struct flash_bank_s *bank, u32 address, u32 word)
+static int pic32mx_write_word(struct flash_bank_s *bank, u32 address, u32 word)
{
target_t *target = bank->target;
/*
* Write a 128 word (512 byte) row to flash address from RAM srcaddr.
*/
-int pic32mx_write_row(struct flash_bank_s *bank, u32 address, u32 srcaddr)
+static int pic32mx_write_row(struct flash_bank_s *bank, u32 address, u32 srcaddr)
{
target_t *target = bank->target;
return pic32mx_nvm_exec(bank, NVMCON_OP_ROW_PROG, 100);
}
-int pic32mx_write(struct flash_bank_s *bank, u8 *buffer, u32 offset, u32 count)
+static int pic32mx_write(struct flash_bank_s *bank, u8 *buffer, u32 offset, u32 count)
{
u32 words_remaining = (count / 4);
u32 bytes_remaining = (count & 0x00000003);
return ERROR_OK;
}
-int pic32mx_probe(struct flash_bank_s *bank)
+static int pic32mx_probe(struct flash_bank_s *bank)
{
target_t *target = bank->target;
pic32mx_flash_bank_t *pic32mx_info = bank->driver_priv;
return ERROR_OK;
}
-int pic32mx_auto_probe(struct flash_bank_s *bank)
+static int pic32mx_auto_probe(struct flash_bank_s *bank)
{
pic32mx_flash_bank_t *pic32mx_info = bank->driver_priv;
if (pic32mx_info->probed)
return pic32mx_probe(bank);
}
-int pic32mx_handle_part_id_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc)
+#if 0
+static int pic32mx_handle_part_id_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc)
{
return ERROR_OK;
}
+#endif
-int pic32mx_info(struct flash_bank_s *bank, char *buf, int buf_size)
+static int pic32mx_info(struct flash_bank_s *bank, char *buf, int buf_size)
{
target_t *target = bank->target;
mips32_common_t *mips32 = target->arch_info;
}
#endif
-int pic32mx_chip_erase(struct flash_bank_s *bank)
+#if 0
+static int pic32mx_chip_erase(struct flash_bank_s *bank)
{
target_t *target = bank->target;
#if 0
return ERROR_OK;
}
+#endif
-int pic32mx_handle_chip_erase_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc)
+static int pic32mx_handle_chip_erase_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc)
{
#if 0
flash_bank_t *bank;
return ERROR_OK;
}
-int pic32mx_handle_pgm_word_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc)
+static int pic32mx_handle_pgm_word_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc)
{
flash_bank_t *bank;
u32 address, value;
#include "s3c24xx_nand.h"
#include "target.h"
-int s3c2410_nand_device_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc, struct nand_device_s *device);
-int s3c2410_init(struct nand_device_s *device);
-int s3c2410_read_data(struct nand_device_s *device, void *data);
-int s3c2410_write_data(struct nand_device_s *device, u16 data);
-int s3c2410_nand_ready(struct nand_device_s *device, int timeout);
+static int s3c2410_nand_device_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc, struct nand_device_s *device);
+static int s3c2410_init(struct nand_device_s *device);
+static int s3c2410_read_data(struct nand_device_s *device, void *data);
+static int s3c2410_write_data(struct nand_device_s *device, u16 data);
+static int s3c2410_nand_ready(struct nand_device_s *device, int timeout);
nand_flash_controller_t s3c2410_nand_controller =
{
.nand_ready = s3c2410_nand_ready,
};
-int s3c2410_nand_device_command(struct command_context_s *cmd_ctx, char *cmd,
+static int s3c2410_nand_device_command(struct command_context_s *cmd_ctx, char *cmd,
char **args, int argc,
struct nand_device_s *device)
{
return ERROR_OK;
}
-int s3c2410_init(struct nand_device_s *device)
+static int s3c2410_init(struct nand_device_s *device)
{
s3c24xx_nand_controller_t *s3c24xx_info = device->controller_priv;
target_t *target = s3c24xx_info->target;
return ERROR_OK;
}
-int s3c2410_write_data(struct nand_device_s *device, u16 data)
+static int s3c2410_write_data(struct nand_device_s *device, u16 data)
{
s3c24xx_nand_controller_t *s3c24xx_info = device->controller_priv;
target_t *target = s3c24xx_info->target;
return ERROR_OK;
}
-int s3c2410_read_data(struct nand_device_s *device, void *data)
+static int s3c2410_read_data(struct nand_device_s *device, void *data)
{
s3c24xx_nand_controller_t *s3c24xx_info = device->controller_priv;
target_t *target = s3c24xx_info->target;
return ERROR_OK;
}
-int s3c2410_nand_ready(struct nand_device_s *device, int timeout)
+static int s3c2410_nand_ready(struct nand_device_s *device, int timeout)
{
s3c24xx_nand_controller_t *s3c24xx_info = device->controller_priv;
target_t *target = s3c24xx_info->target;
#include "s3c24xx_nand.h"
#include "target.h"
-int s3c2412_nand_device_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc, struct nand_device_s *device);
-int s3c2412_init(struct nand_device_s *device);
+static int s3c2412_nand_device_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc, struct nand_device_s *device);
+static int s3c2412_init(struct nand_device_s *device);
nand_flash_controller_t s3c2412_nand_controller =
{
.nand_ready = s3c2440_nand_ready,
};
-int s3c2412_nand_device_command(struct command_context_s *cmd_ctx, char *cmd,
+static int s3c2412_nand_device_command(struct command_context_s *cmd_ctx, char *cmd,
char **args, int argc,
struct nand_device_s *device)
{
return ERROR_OK;
}
-int s3c2412_init(struct nand_device_s *device)
+static int s3c2412_init(struct nand_device_s *device)
{
s3c24xx_nand_controller_t *s3c24xx_info = device->controller_priv;
target_t *target = s3c24xx_info->target;
#include "s3c24xx_nand.h"
#include "target.h"
-int s3c2440_nand_device_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc, struct nand_device_s *device);
-int s3c2440_init(struct nand_device_s *device);
-int s3c2440_nand_ready(struct nand_device_s *device, int timeout);
+static int s3c2440_nand_device_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc, struct nand_device_s *device);
+static int s3c2440_init(struct nand_device_s *device);
+//static int s3c2440_nand_ready(struct nand_device_s *device, int timeout);
nand_flash_controller_t s3c2440_nand_controller =
{
.nand_ready = s3c2440_nand_ready,
};
-int s3c2440_nand_device_command(struct command_context_s *cmd_ctx, char *cmd,
+static int s3c2440_nand_device_command(struct command_context_s *cmd_ctx, char *cmd,
char **args, int argc,
struct nand_device_s *device)
{
return ERROR_OK;
}
-int s3c2440_init(struct nand_device_s *device)
+static int s3c2440_init(struct nand_device_s *device)
{
s3c24xx_nand_controller_t *s3c24xx_info = device->controller_priv;
target_t *target = s3c24xx_info->target;
#include "s3c24xx_nand.h"
#include "target.h"
-int s3c2443_nand_device_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc, struct nand_device_s *device);
-int s3c2443_init(struct nand_device_s *device);
-int s3c2443_nand_ready(struct nand_device_s *device, int timeout);
+static int s3c2443_nand_device_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc, struct nand_device_s *device);
+static int s3c2443_init(struct nand_device_s *device);
nand_flash_controller_t s3c2443_nand_controller =
{
.nand_ready = s3c2440_nand_ready,
};
-int s3c2443_nand_device_command(struct command_context_s *cmd_ctx, char *cmd,
+static int s3c2443_nand_device_command(struct command_context_s *cmd_ctx, char *cmd,
char **args, int argc,
struct nand_device_s *device)
{
return ERROR_OK;
}
-int s3c2443_init(struct nand_device_s *device)
+static int s3c2443_init(struct nand_device_s *device)
{
s3c24xx_nand_controller_t *s3c24xx_info = device->controller_priv;
target_t *target = s3c24xx_info->target;
#include <unistd.h>
#define DID0_VER(did0) ((did0>>28)&0x07)
-int stellaris_register_commands(struct command_context_s *cmd_ctx);
-int stellaris_flash_bank_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc, struct flash_bank_s *bank);
-int stellaris_erase(struct flash_bank_s *bank, int first, int last);
-int stellaris_protect(struct flash_bank_s *bank, int set, int first, int last);
-int stellaris_write(struct flash_bank_s *bank, u8 *buffer, u32 offset, u32 count);
-int stellaris_auto_probe(struct flash_bank_s *bank);
-int stellaris_probe(struct flash_bank_s *bank);
-int stellaris_protect_check(struct flash_bank_s *bank);
-int stellaris_info(struct flash_bank_s *bank, char *buf, int buf_size);
-
-int stellaris_read_part_info(struct flash_bank_s *bank);
-u32 stellaris_get_flash_status(flash_bank_t *bank);
-void stellaris_set_flash_mode(flash_bank_t *bank,int mode);
-u32 stellaris_wait_status_busy(flash_bank_t *bank, u32 waitbits, int timeout);
-
-int stellaris_read_part_info(struct flash_bank_s *bank);
-int stellaris_handle_mass_erase_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc);
-int stellaris_mass_erase(struct flash_bank_s *bank);
+static int stellaris_register_commands(struct command_context_s *cmd_ctx);
+static int stellaris_flash_bank_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc, struct flash_bank_s *bank);
+static int stellaris_erase(struct flash_bank_s *bank, int first, int last);
+static int stellaris_protect(struct flash_bank_s *bank, int set, int first, int last);
+static int stellaris_write(struct flash_bank_s *bank, u8 *buffer, u32 offset, u32 count);
+static int stellaris_auto_probe(struct flash_bank_s *bank);
+static int stellaris_probe(struct flash_bank_s *bank);
+static int stellaris_protect_check(struct flash_bank_s *bank);
+static int stellaris_info(struct flash_bank_s *bank, char *buf, int buf_size);
+
+static int stellaris_read_part_info(struct flash_bank_s *bank);
+static u32 stellaris_get_flash_status(flash_bank_t *bank);
+static void stellaris_set_flash_mode(flash_bank_t *bank,int mode);
+//static u32 stellaris_wait_status_busy(flash_bank_t *bank, u32 waitbits, int timeout);
+
+static int stellaris_read_part_info(struct flash_bank_s *bank);
+static int stellaris_handle_mass_erase_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc);
+static int stellaris_mass_erase(struct flash_bank_s *bank);
flash_driver_t stellaris_flash =
{
.info = stellaris_info
};
-struct {
+static struct {
u32 partno;
char *partname;
} StellarisParts[] =
{0,"Unknown part"}
};
-char * StellarisClassname[5] =
+static char * StellarisClassname[5] =
{
"Sandstorm",
"Fury",
/* flash_bank stellaris <base> <size> 0 0 <target#>
*/
-int stellaris_flash_bank_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc, struct flash_bank_s *bank)
+static int stellaris_flash_bank_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc, struct flash_bank_s *bank)
{
stellaris_flash_bank_t *stellaris_info;
return ERROR_OK;
}
-int stellaris_register_commands(struct command_context_s *cmd_ctx)
+static int stellaris_register_commands(struct command_context_s *cmd_ctx)
{
command_t *stm32x_cmd = register_command(cmd_ctx, NULL, "stellaris", NULL, COMMAND_ANY, "stellaris flash specific commands");
return ERROR_OK;
}
-int stellaris_info(struct flash_bank_s *bank, char *buf, int buf_size)
+static int stellaris_info(struct flash_bank_s *bank, char *buf, int buf_size)
{
int printed, device_class;
stellaris_flash_bank_t *stellaris_info = bank->driver_priv;
* chip identification and status *
***************************************************************************/
-u32 stellaris_get_flash_status(flash_bank_t *bank)
+static u32 stellaris_get_flash_status(flash_bank_t *bank)
{
target_t *target = bank->target;
u32 fmc;
/** Read clock configuration and set stellaris_info->usec_clocks*/
-void stellaris_read_clock_info(flash_bank_t *bank)
+static void stellaris_read_clock_info(flash_bank_t *bank)
{
stellaris_flash_bank_t *stellaris_info = bank->driver_priv;
target_t *target = bank->target;
}
/* Setup the timimg registers */
-void stellaris_set_flash_mode(flash_bank_t *bank,int mode)
+static void stellaris_set_flash_mode(flash_bank_t *bank,int mode)
{
stellaris_flash_bank_t *stellaris_info = bank->driver_priv;
target_t *target = bank->target;
target_write_u32(target, SCB_BASE|USECRL, usecrl);
}
-u32 stellaris_wait_status_busy(flash_bank_t *bank, u32 waitbits, int timeout)
+#if 0
+static u32 stellaris_wait_status_busy(flash_bank_t *bank, u32 waitbits, int timeout)
{
u32 status;
}
/* Send one command to the flash controller */
-int stellaris_flash_command(struct flash_bank_s *bank,u8 cmd,u16 pagen)
+static int stellaris_flash_command(struct flash_bank_s *bank,u8 cmd,u16 pagen)
{
u32 fmc;
target_t *target = bank->target;
return ERROR_OK;
}
+#endif
/* Read device id register, main clock frequency register and fill in driver info structure */
-int stellaris_read_part_info(struct flash_bank_s *bank)
+static int stellaris_read_part_info(struct flash_bank_s *bank)
{
stellaris_flash_bank_t *stellaris_info = bank->driver_priv;
target_t *target = bank->target;
* flash operations *
***************************************************************************/
-int stellaris_protect_check(struct flash_bank_s *bank)
+static int stellaris_protect_check(struct flash_bank_s *bank)
{
u32 status;
return ERROR_OK;
}
-int stellaris_erase(struct flash_bank_s *bank, int first, int last)
+static int stellaris_erase(struct flash_bank_s *bank, int first, int last)
{
int banknr;
u32 flash_fmc, flash_cris;
return ERROR_OK;
}
-int stellaris_protect(struct flash_bank_s *bank, int set, int first, int last)
+static int stellaris_protect(struct flash_bank_s *bank, int set, int first, int last)
{
u32 fmppe, flash_fmc, flash_cris;
int lockregion;
return ERROR_OK;
}
-u8 stellaris_write_code[] =
+static u8 stellaris_write_code[] =
{
/*
Call with :
0x01,0x00,0x42,0xA4 /* .word 0xA4420001 */
};
-int stellaris_write_block(struct flash_bank_s *bank, u8 *buffer, u32 offset, u32 wcount)
+static int stellaris_write_block(struct flash_bank_s *bank, u8 *buffer, u32 offset, u32 wcount)
{
target_t *target = bank->target;
u32 buffer_size = 8192;
return retval;
}
-int stellaris_write(struct flash_bank_s *bank, u8 *buffer, u32 offset, u32 count)
+static int stellaris_write(struct flash_bank_s *bank, u8 *buffer, u32 offset, u32 count)
{
stellaris_flash_bank_t *stellaris_info = bank->driver_priv;
target_t *target = bank->target;
return ERROR_OK;
}
-int stellaris_probe(struct flash_bank_s *bank)
+static int stellaris_probe(struct flash_bank_s *bank)
{
/* we can't probe on an stellaris
* if this is an stellaris, it has the configured flash
return stellaris_read_part_info(bank);
}
-int stellaris_auto_probe(struct flash_bank_s *bank)
+static int stellaris_auto_probe(struct flash_bank_s *bank)
{
stellaris_flash_bank_t *stellaris_info = bank->driver_priv;
if (stellaris_info->did1)
return stellaris_probe(bank);
}
-int stellaris_mass_erase(struct flash_bank_s *bank)
+static int stellaris_mass_erase(struct flash_bank_s *bank)
{
target_t *target = NULL;
stellaris_flash_bank_t *stellaris_info = NULL;
return ERROR_OK;
}
-int stellaris_handle_mass_erase_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc)
+static int stellaris_handle_mass_erase_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc)
{
flash_bank_t *bank;
int i;
#include <stdlib.h>
#include <string.h>
-int stm32x_register_commands(struct command_context_s *cmd_ctx);
-int stm32x_flash_bank_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc, struct flash_bank_s *bank);
-int stm32x_erase(struct flash_bank_s *bank, int first, int last);
-int stm32x_protect(struct flash_bank_s *bank, int set, int first, int last);
-int stm32x_write(struct flash_bank_s *bank, u8 *buffer, u32 offset, u32 count);
-int stm32x_probe(struct flash_bank_s *bank);
-int stm32x_auto_probe(struct flash_bank_s *bank);
-int stm32x_handle_part_id_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc);
-int stm32x_protect_check(struct flash_bank_s *bank);
-int stm32x_info(struct flash_bank_s *bank, char *buf, int buf_size);
+static int stm32x_register_commands(struct command_context_s *cmd_ctx);
+static int stm32x_flash_bank_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc, struct flash_bank_s *bank);
+static int stm32x_erase(struct flash_bank_s *bank, int first, int last);
+static int stm32x_protect(struct flash_bank_s *bank, int set, int first, int last);
+static int stm32x_write(struct flash_bank_s *bank, u8 *buffer, u32 offset, u32 count);
+static int stm32x_probe(struct flash_bank_s *bank);
+static int stm32x_auto_probe(struct flash_bank_s *bank);
+//static int stm32x_handle_part_id_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc);
+static int stm32x_protect_check(struct flash_bank_s *bank);
+static int stm32x_info(struct flash_bank_s *bank, char *buf, int buf_size);
-int stm32x_handle_lock_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc);
-int stm32x_handle_unlock_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc);
-int stm32x_handle_options_read_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc);
-int stm32x_handle_options_write_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc);
-int stm32x_handle_mass_erase_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc);
-int stm32x_mass_erase(struct flash_bank_s *bank);
+static int stm32x_handle_lock_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc);
+static int stm32x_handle_unlock_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc);
+static int stm32x_handle_options_read_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc);
+static int stm32x_handle_options_write_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc);
+static int stm32x_handle_mass_erase_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc);
+static int stm32x_mass_erase(struct flash_bank_s *bank);
flash_driver_t stm32x_flash =
{
.info = stm32x_info
};
-int stm32x_register_commands(struct command_context_s *cmd_ctx)
+static int stm32x_register_commands(struct command_context_s *cmd_ctx)
{
command_t *stm32x_cmd = register_command(cmd_ctx, NULL, "stm32x", NULL, COMMAND_ANY, "stm32x flash specific commands");
/* flash bank stm32x <base> <size> 0 0 <target#>
*/
-int stm32x_flash_bank_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc, struct flash_bank_s *bank)
+static int stm32x_flash_bank_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc, struct flash_bank_s *bank)
{
stm32x_flash_bank_t *stm32x_info;
return ERROR_OK;
}
-u32 stm32x_get_flash_status(flash_bank_t *bank)
+static u32 stm32x_get_flash_status(flash_bank_t *bank)
{
target_t *target = bank->target;
u32 status;
return status;
}
-u32 stm32x_wait_status_busy(flash_bank_t *bank, int timeout)
+static u32 stm32x_wait_status_busy(flash_bank_t *bank, int timeout)
{
u32 status;
return status;
}
-int stm32x_read_options(struct flash_bank_s *bank)
+static int stm32x_read_options(struct flash_bank_s *bank)
{
u32 optiondata;
stm32x_flash_bank_t *stm32x_info = NULL;
return ERROR_OK;
}
-int stm32x_erase_options(struct flash_bank_s *bank)
+static int stm32x_erase_options(struct flash_bank_s *bank)
{
stm32x_flash_bank_t *stm32x_info = NULL;
target_t *target = bank->target;
return ERROR_OK;
}
-int stm32x_write_options(struct flash_bank_s *bank)
+static int stm32x_write_options(struct flash_bank_s *bank)
{
stm32x_flash_bank_t *stm32x_info = NULL;
target_t *target = bank->target;
return ERROR_OK;
}
-int stm32x_protect_check(struct flash_bank_s *bank)
+static int stm32x_protect_check(struct flash_bank_s *bank)
{
target_t *target = bank->target;
stm32x_flash_bank_t *stm32x_info = bank->driver_priv;
return ERROR_OK;
}
-int stm32x_erase(struct flash_bank_s *bank, int first, int last)
+static int stm32x_erase(struct flash_bank_s *bank, int first, int last)
{
target_t *target = bank->target;
int i;
return ERROR_OK;
}
-int stm32x_protect(struct flash_bank_s *bank, int set, int first, int last)
+static int stm32x_protect(struct flash_bank_s *bank, int set, int first, int last)
{
stm32x_flash_bank_t *stm32x_info = NULL;
target_t *target = bank->target;
return stm32x_write_options(bank);
}
-int stm32x_write_block(struct flash_bank_s *bank, u8 *buffer, u32 offset, u32 count)
+static int stm32x_write_block(struct flash_bank_s *bank, u8 *buffer, u32 offset, u32 count)
{
stm32x_flash_bank_t *stm32x_info = bank->driver_priv;
target_t *target = bank->target;
return retval;
}
-int stm32x_write(struct flash_bank_s *bank, u8 *buffer, u32 offset, u32 count)
+static int stm32x_write(struct flash_bank_s *bank, u8 *buffer, u32 offset, u32 count)
{
target_t *target = bank->target;
u32 words_remaining = (count / 2);
return ERROR_OK;
}
-int stm32x_probe(struct flash_bank_s *bank)
+static int stm32x_probe(struct flash_bank_s *bank)
{
target_t *target = bank->target;
stm32x_flash_bank_t *stm32x_info = bank->driver_priv;
return ERROR_OK;
}
-int stm32x_auto_probe(struct flash_bank_s *bank)
+static int stm32x_auto_probe(struct flash_bank_s *bank)
{
stm32x_flash_bank_t *stm32x_info = bank->driver_priv;
if (stm32x_info->probed)
return stm32x_probe(bank);
}
-int stm32x_handle_part_id_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc)
+#if 0
+static int stm32x_handle_part_id_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc)
{
return ERROR_OK;
}
+#endif
-int stm32x_info(struct flash_bank_s *bank, char *buf, int buf_size)
+static int stm32x_info(struct flash_bank_s *bank, char *buf, int buf_size)
{
target_t *target = bank->target;
u32 device_id;
return ERROR_OK;
}
-int stm32x_handle_lock_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc)
+static int stm32x_handle_lock_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc)
{
flash_bank_t *bank;
target_t *target = NULL;
return ERROR_OK;
}
-int stm32x_handle_unlock_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc)
+static int stm32x_handle_unlock_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc)
{
flash_bank_t *bank;
target_t *target = NULL;
return ERROR_OK;
}
-int stm32x_handle_options_read_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc)
+static int stm32x_handle_options_read_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc)
{
flash_bank_t *bank;
u32 optionbyte;
return ERROR_OK;
}
-int stm32x_handle_options_write_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc)
+static int stm32x_handle_options_write_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc)
{
flash_bank_t *bank;
target_t *target = NULL;
return ERROR_OK;
}
-int stm32x_mass_erase(struct flash_bank_s *bank)
+static int stm32x_mass_erase(struct flash_bank_s *bank)
{
target_t *target = bank->target;
u32 status;
return ERROR_OK;
}
-int stm32x_handle_mass_erase_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc)
+static int stm32x_handle_mass_erase_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc)
{
flash_bank_t *bank;
int i;
{0x00002000, 0x02000, 0x20000}
};
-int str7x_register_commands(struct command_context_s *cmd_ctx);
-int str7x_flash_bank_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc, struct flash_bank_s *bank);
-int str7x_erase(struct flash_bank_s *bank, int first, int last);
-int str7x_protect(struct flash_bank_s *bank, int set, int first, int last);
-int str7x_write(struct flash_bank_s *bank, u8 *buffer, u32 offset, u32 count);
-int str7x_probe(struct flash_bank_s *bank);
-int str7x_handle_part_id_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc);
-int str7x_protect_check(struct flash_bank_s *bank);
-int str7x_info(struct flash_bank_s *bank, char *buf, int buf_size);
-
-int str7x_handle_disable_jtag_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc);
+static int str7x_register_commands(struct command_context_s *cmd_ctx);
+static int str7x_flash_bank_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc, struct flash_bank_s *bank);
+static int str7x_erase(struct flash_bank_s *bank, int first, int last);
+static int str7x_protect(struct flash_bank_s *bank, int set, int first, int last);
+static int str7x_write(struct flash_bank_s *bank, u8 *buffer, u32 offset, u32 count);
+static int str7x_probe(struct flash_bank_s *bank);
+//static int str7x_handle_part_id_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc);
+static int str7x_protect_check(struct flash_bank_s *bank);
+static int str7x_info(struct flash_bank_s *bank, char *buf, int buf_size);
+
+static int str7x_handle_disable_jtag_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc);
flash_driver_t str7x_flash =
{
.info = str7x_info
};
-int str7x_register_commands(struct command_context_s *cmd_ctx)
+static int str7x_register_commands(struct command_context_s *cmd_ctx)
{
command_t *str7x_cmd = register_command(cmd_ctx, NULL, "str7x", NULL, COMMAND_ANY, NULL);
return ERROR_OK;
}
-int str7x_get_flash_adr(struct flash_bank_s *bank, u32 reg)
+static int str7x_get_flash_adr(struct flash_bank_s *bank, u32 reg)
{
str7x_flash_bank_t *str7x_info = bank->driver_priv;
return (str7x_info->register_base | reg);
}
-int str7x_build_block_list(struct flash_bank_s *bank)
+static int str7x_build_block_list(struct flash_bank_s *bank)
{
str7x_flash_bank_t *str7x_info = bank->driver_priv;
/* flash bank str7x <base> <size> 0 0 <target#> <str71_variant>
*/
-int str7x_flash_bank_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc, struct flash_bank_s *bank)
+static int str7x_flash_bank_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc, struct flash_bank_s *bank)
{
str7x_flash_bank_t *str7x_info;
return ERROR_OK;
}
-u32 str7x_status(struct flash_bank_s *bank)
+static u32 str7x_status(struct flash_bank_s *bank)
{
target_t *target = bank->target;
u32 retval;
return retval;
}
-u32 str7x_result(struct flash_bank_s *bank)
+static u32 str7x_result(struct flash_bank_s *bank)
{
target_t *target = bank->target;
u32 retval;
return retval;
}
-int str7x_protect_check(struct flash_bank_s *bank)
+static int str7x_protect_check(struct flash_bank_s *bank)
{
str7x_flash_bank_t *str7x_info = bank->driver_priv;
target_t *target = bank->target;
return ERROR_OK;
}
-int str7x_erase(struct flash_bank_s *bank, int first, int last)
+static int str7x_erase(struct flash_bank_s *bank, int first, int last)
{
str7x_flash_bank_t *str7x_info = bank->driver_priv;
target_t *target = bank->target;
return ERROR_OK;
}
-int str7x_protect(struct flash_bank_s *bank, int set, int first, int last)
+static int str7x_protect(struct flash_bank_s *bank, int set, int first, int last)
{
str7x_flash_bank_t *str7x_info = bank->driver_priv;
target_t *target = bank->target;
return ERROR_OK;
}
-int str7x_write_block(struct flash_bank_s *bank, u8 *buffer, u32 offset, u32 count)
+static int str7x_write_block(struct flash_bank_s *bank, u8 *buffer, u32 offset, u32 count)
{
str7x_flash_bank_t *str7x_info = bank->driver_priv;
target_t *target = bank->target;
return retval;
}
-int str7x_write(struct flash_bank_s *bank, u8 *buffer, u32 offset, u32 count)
+static int str7x_write(struct flash_bank_s *bank, u8 *buffer, u32 offset, u32 count)
{
target_t *target = bank->target;
str7x_flash_bank_t *str7x_info = bank->driver_priv;
return ERROR_OK;
}
-int str7x_probe(struct flash_bank_s *bank)
+static int str7x_probe(struct flash_bank_s *bank)
{
return ERROR_OK;
}
-int str7x_handle_part_id_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc)
+#if 0
+static int str7x_handle_part_id_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc)
{
return ERROR_OK;
}
+#endif
-int str7x_info(struct flash_bank_s *bank, char *buf, int buf_size)
+static int str7x_info(struct flash_bank_s *bank, char *buf, int buf_size)
{
snprintf(buf, buf_size, "str7x flash driver info" );
return ERROR_OK;
}
-int str7x_handle_disable_jtag_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc)
+static int str7x_handle_disable_jtag_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc)
{
flash_bank_t *bank;
target_t *target = NULL;
static u32 bank1start = 0x00080000;
-int str9x_register_commands(struct command_context_s *cmd_ctx);
-int str9x_flash_bank_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc, struct flash_bank_s *bank);
-int str9x_erase(struct flash_bank_s *bank, int first, int last);
-int str9x_protect(struct flash_bank_s *bank, int set, int first, int last);
-int str9x_write(struct flash_bank_s *bank, u8 *buffer, u32 offset, u32 count);
-int str9x_probe(struct flash_bank_s *bank);
-int str9x_handle_part_id_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc);
-int str9x_protect_check(struct flash_bank_s *bank);
-int str9x_info(struct flash_bank_s *bank, char *buf, int buf_size);
+static int str9x_register_commands(struct command_context_s *cmd_ctx);
+static int str9x_flash_bank_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc, struct flash_bank_s *bank);
+static int str9x_erase(struct flash_bank_s *bank, int first, int last);
+static int str9x_protect(struct flash_bank_s *bank, int set, int first, int last);
+static int str9x_write(struct flash_bank_s *bank, u8 *buffer, u32 offset, u32 count);
+static int str9x_probe(struct flash_bank_s *bank);
+//static int str9x_handle_part_id_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc);
+static int str9x_protect_check(struct flash_bank_s *bank);
+static int str9x_info(struct flash_bank_s *bank, char *buf, int buf_size);
-int str9x_handle_flash_config_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc);
+static int str9x_handle_flash_config_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc);
flash_driver_t str9x_flash =
{
.info = str9x_info
};
-int str9x_register_commands(struct command_context_s *cmd_ctx)
+static int str9x_register_commands(struct command_context_s *cmd_ctx)
{
command_t *str9x_cmd = register_command(cmd_ctx, NULL, "str9x", NULL, COMMAND_ANY, NULL);
return ERROR_OK;
}
-int str9x_build_block_list(struct flash_bank_s *bank)
+static int str9x_build_block_list(struct flash_bank_s *bank)
{
str9x_flash_bank_t *str9x_info = bank->driver_priv;
/* flash bank str9x <base> <size> 0 0 <target#>
*/
-int str9x_flash_bank_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc, struct flash_bank_s *bank)
+static int str9x_flash_bank_command(struct command_context_s *cmd_ctx,
+ char *cmd, char **args, int argc, struct flash_bank_s *bank)
{
str9x_flash_bank_t *str9x_info;
return ERROR_OK;
}
-int str9x_protect_check(struct flash_bank_s *bank)
+static int str9x_protect_check(struct flash_bank_s *bank)
{
int retval;
str9x_flash_bank_t *str9x_info = bank->driver_priv;
return ERROR_OK;
}
-int str9x_erase(struct flash_bank_s *bank, int first, int last)
+static int str9x_erase(struct flash_bank_s *bank, int first, int last)
{
target_t *target = bank->target;
int i;
return ERROR_OK;
}
-int str9x_protect(struct flash_bank_s *bank, int set, int first, int last)
+static int str9x_protect(struct flash_bank_s *bank,
+ int set, int first, int last)
{
target_t *target = bank->target;
int i;
return ERROR_OK;
}
-int str9x_write_block(struct flash_bank_s *bank, u8 *buffer, u32 offset, u32 count)
+static int str9x_write_block(struct flash_bank_s *bank,
+ u8 *buffer, u32 offset, u32 count)
{
str9x_flash_bank_t *str9x_info = bank->driver_priv;
target_t *target = bank->target;
return retval;
}
-int str9x_write(struct flash_bank_s *bank, u8 *buffer, u32 offset, u32 count)
+static int str9x_write(struct flash_bank_s *bank,
+ u8 *buffer, u32 offset, u32 count)
{
target_t *target = bank->target;
u32 words_remaining = (count / 2);
return ERROR_OK;
}
-int str9x_probe(struct flash_bank_s *bank)
+static int str9x_probe(struct flash_bank_s *bank)
{
return ERROR_OK;
}
-int str9x_handle_part_id_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc)
+#if 0
+static int str9x_handle_part_id_command(struct command_context_s *cmd_ctx,
+ char *cmd, char **args, int argc)
{
return ERROR_OK;
}
+#endif
-int str9x_info(struct flash_bank_s *bank, char *buf, int buf_size)
+static int str9x_info(struct flash_bank_s *bank, char *buf, int buf_size)
{
snprintf(buf, buf_size, "str9x flash driver info" );
return ERROR_OK;
}
-int str9x_handle_flash_config_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc)
+static int str9x_handle_flash_config_command(struct command_context_s *cmd_ctx,
+ char *cmd, char **args, int argc)
{
str9x_flash_bank_t *str9x_info;
flash_bank_t *bank;
#include <unistd.h>
#include <getopt.h>
-int str9xpec_register_commands(struct command_context_s *cmd_ctx);
-int str9xpec_flash_bank_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc, struct flash_bank_s *bank);
-int str9xpec_erase(struct flash_bank_s *bank, int first, int last);
-int str9xpec_protect(struct flash_bank_s *bank, int set, int first, int last);
-int str9xpec_write(struct flash_bank_s *bank, u8 *buffer, u32 offset, u32 count);
-int str9xpec_probe(struct flash_bank_s *bank);
-int str9xpec_handle_part_id_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc);
-int str9xpec_protect_check(struct flash_bank_s *bank);
-int str9xpec_erase_check(struct flash_bank_s *bank);
-int str9xpec_info(struct flash_bank_s *bank, char *buf, int buf_size);
-
-int str9xpec_erase_area(struct flash_bank_s *bank, int first, int last);
-int str9xpec_set_address(struct flash_bank_s *bank, u8 sector);
-int str9xpec_write_options(struct flash_bank_s *bank);
-
-int str9xpec_handle_flash_options_cmap_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc);
-int str9xpec_handle_flash_options_lvdthd_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc);
-int str9xpec_handle_flash_options_lvdsel_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc);
-int str9xpec_handle_flash_options_lvdwarn_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc);
-int str9xpec_handle_flash_options_read_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc);
-int str9xpec_handle_flash_options_write_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc);
-int str9xpec_handle_flash_lock_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc);
-int str9xpec_handle_flash_unlock_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc);
-int str9xpec_handle_flash_enable_turbo_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc);
-int str9xpec_handle_flash_disable_turbo_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc);
+static int str9xpec_register_commands(struct command_context_s *cmd_ctx);
+static int str9xpec_flash_bank_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc, struct flash_bank_s *bank);
+static int str9xpec_erase(struct flash_bank_s *bank, int first, int last);
+static int str9xpec_protect(struct flash_bank_s *bank, int set, int first, int last);
+static int str9xpec_write(struct flash_bank_s *bank, u8 *buffer, u32 offset, u32 count);
+static int str9xpec_probe(struct flash_bank_s *bank);
+static int str9xpec_handle_part_id_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc);
+static int str9xpec_protect_check(struct flash_bank_s *bank);
+static int str9xpec_erase_check(struct flash_bank_s *bank);
+static int str9xpec_info(struct flash_bank_s *bank, char *buf, int buf_size);
+
+static int str9xpec_erase_area(struct flash_bank_s *bank, int first, int last);
+static int str9xpec_set_address(struct flash_bank_s *bank, u8 sector);
+static int str9xpec_write_options(struct flash_bank_s *bank);
+
+static int str9xpec_handle_flash_options_cmap_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc);
+static int str9xpec_handle_flash_options_lvdthd_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc);
+static int str9xpec_handle_flash_options_lvdsel_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc);
+static int str9xpec_handle_flash_options_lvdwarn_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc);
+static int str9xpec_handle_flash_options_read_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc);
+static int str9xpec_handle_flash_options_write_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc);
+static int str9xpec_handle_flash_lock_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc);
+static int str9xpec_handle_flash_unlock_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc);
+static int str9xpec_handle_flash_enable_turbo_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc);
+static int str9xpec_handle_flash_disable_turbo_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc);
flash_driver_t str9xpec_flash =
{
.info = str9xpec_info
};
-int str9xpec_register_commands(struct command_context_s *cmd_ctx)
+static int str9xpec_register_commands(struct command_context_s *cmd_ctx)
{
command_t *str9xpec_cmd = register_command(cmd_ctx, NULL, "str9xpec", NULL, COMMAND_ANY, "str9xpec flash specific commands");
return ERROR_OK;
}
-u8 str9xpec_isc_status(jtag_tap_t *tap)
+static u8 str9xpec_isc_status(jtag_tap_t *tap)
{
scan_field_t field;
u8 status;
return status;
}
-int str9xpec_isc_enable(struct flash_bank_s *bank)
+static int str9xpec_isc_enable(struct flash_bank_s *bank)
{
u8 status;
jtag_tap_t *tap;
return ERROR_OK;
}
-int str9xpec_isc_disable(struct flash_bank_s *bank)
+static int str9xpec_isc_disable(struct flash_bank_s *bank)
{
u8 status;
jtag_tap_t *tap;
return ERROR_OK;
}
-int str9xpec_read_config(struct flash_bank_s *bank)
+static int str9xpec_read_config(struct flash_bank_s *bank)
{
scan_field_t field;
u8 status;
return status;
}
-int str9xpec_build_block_list(struct flash_bank_s *bank)
+static int str9xpec_build_block_list(struct flash_bank_s *bank)
{
str9xpec_flash_controller_t *str9xpec_info = bank->driver_priv;
/* flash bank str9x <base> <size> 0 0 <target#>
*/
-int str9xpec_flash_bank_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc, struct flash_bank_s *bank)
+static int str9xpec_flash_bank_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc, struct flash_bank_s *bank)
{
str9xpec_flash_controller_t *str9xpec_info;
armv4_5_common_t *armv4_5 = NULL;
return ERROR_OK;
}
-int str9xpec_blank_check(struct flash_bank_s *bank, int first, int last)
+static int str9xpec_blank_check(struct flash_bank_s *bank, int first, int last)
{
scan_field_t field;
u8 status;
return ERROR_OK;
}
-int str9xpec_protect_check(struct flash_bank_s *bank)
+static int str9xpec_protect_check(struct flash_bank_s *bank)
{
u8 status;
int i;
return ERROR_OK;
}
-int str9xpec_erase_area(struct flash_bank_s *bank, int first, int last)
+static int str9xpec_erase_area(struct flash_bank_s *bank, int first, int last)
{
scan_field_t field;
u8 status;
return status;
}
-int str9xpec_erase(struct flash_bank_s *bank, int first, int last)
+static int str9xpec_erase(struct flash_bank_s *bank, int first, int last)
{
int status;
return ERROR_OK;
}
-int str9xpec_lock_device(struct flash_bank_s *bank)
+static int str9xpec_lock_device(struct flash_bank_s *bank)
{
scan_field_t field;
u8 status;
return status;
}
-int str9xpec_unlock_device(struct flash_bank_s *bank)
+static int str9xpec_unlock_device(struct flash_bank_s *bank)
{
u8 status;
return status;
}
-int str9xpec_protect(struct flash_bank_s *bank, int set, int first, int last)
+static int str9xpec_protect(struct flash_bank_s *bank, int set, int first, int last)
{
u8 status;
int i;
return ERROR_OK;
}
-int str9xpec_set_address(struct flash_bank_s *bank, u8 sector)
+static int str9xpec_set_address(struct flash_bank_s *bank, u8 sector)
{
jtag_tap_t *tap;
scan_field_t field;
return ERROR_OK;
}
-int str9xpec_write(struct flash_bank_s *bank, u8 *buffer, u32 offset, u32 count)
+static int str9xpec_write(struct flash_bank_s *bank, u8 *buffer, u32 offset, u32 count)
{
str9xpec_flash_controller_t *str9xpec_info = bank->driver_priv;
u32 dwords_remaining = (count / 8);
return ERROR_OK;
}
-int str9xpec_probe(struct flash_bank_s *bank)
+static int str9xpec_probe(struct flash_bank_s *bank)
{
return ERROR_OK;
}
-int str9xpec_handle_part_id_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc)
+static int str9xpec_handle_part_id_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc)
{
flash_bank_t *bank;
scan_field_t field;
return ERROR_OK;
}
-int str9xpec_erase_check(struct flash_bank_s *bank)
+static int str9xpec_erase_check(struct flash_bank_s *bank)
{
return str9xpec_blank_check(bank, 0, bank->num_sectors - 1);
}
-int str9xpec_info(struct flash_bank_s *bank, char *buf, int buf_size)
+static int str9xpec_info(struct flash_bank_s *bank, char *buf, int buf_size)
{
snprintf(buf, buf_size, "str9xpec flash driver info" );
return ERROR_OK;
}
-int str9xpec_handle_flash_options_read_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc)
+static int str9xpec_handle_flash_options_read_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc)
{
flash_bank_t *bank;
u8 status;
return ERROR_OK;
}
-int str9xpec_write_options(struct flash_bank_s *bank)
+static int str9xpec_write_options(struct flash_bank_s *bank)
{
scan_field_t field;
u8 status;
return status;
}
-int str9xpec_handle_flash_options_write_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc)
+static int str9xpec_handle_flash_options_write_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc)
{
flash_bank_t *bank;
u8 status;
return ERROR_OK;
}
-int str9xpec_handle_flash_options_cmap_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc)
+static int str9xpec_handle_flash_options_cmap_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc)
{
flash_bank_t *bank;
str9xpec_flash_controller_t *str9xpec_info = NULL;
return ERROR_OK;
}
-int str9xpec_handle_flash_options_lvdthd_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc)
+static int str9xpec_handle_flash_options_lvdthd_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc)
{
flash_bank_t *bank;
str9xpec_flash_controller_t *str9xpec_info = NULL;
return ERROR_OK;
}
-int str9xpec_handle_flash_options_lvdwarn_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc)
+static int str9xpec_handle_flash_options_lvdwarn_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc)
{
flash_bank_t *bank;
str9xpec_flash_controller_t *str9xpec_info = NULL;
return ERROR_OK;
}
-int str9xpec_handle_flash_lock_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc)
+static int str9xpec_handle_flash_lock_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc)
{
u8 status;
flash_bank_t *bank;
return ERROR_OK;
}
-int str9xpec_handle_flash_unlock_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc)
+static int str9xpec_handle_flash_unlock_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc)
{
u8 status;
flash_bank_t *bank;
return ERROR_OK;
}
-int str9xpec_handle_flash_enable_turbo_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc)
+static int str9xpec_handle_flash_enable_turbo_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc)
{
int retval;
flash_bank_t *bank;
return ERROR_OK;
}
-int str9xpec_handle_flash_disable_turbo_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc)
+static int str9xpec_handle_flash_disable_turbo_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc)
{
flash_bank_t *bank;
jtag_tap_t *tap;
#include <string.h>
#include <unistd.h>
-int tms470_register_commands(struct command_context_s *cmd_ctx);
-int tms470_flash_bank_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc, struct flash_bank_s *bank);
-int tms470_erase(struct flash_bank_s *bank, int first, int last);
-int tms470_protect(struct flash_bank_s *bank, int set, int first, int last);
-int tms470_write(struct flash_bank_s *bank, u8 * buffer, u32 offset, u32 count);
-int tms470_probe(struct flash_bank_s *bank);
-int tms470_auto_probe(struct flash_bank_s *bank);
-int tms470_erase_check(struct flash_bank_s *bank);
-int tms470_protect_check(struct flash_bank_s *bank);
-int tms470_info(struct flash_bank_s *bank, char *buf, int buf_size);
+static int tms470_register_commands(struct command_context_s *cmd_ctx);
+static int tms470_flash_bank_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc, struct flash_bank_s *bank);
+static int tms470_erase(struct flash_bank_s *bank, int first, int last);
+static int tms470_protect(struct flash_bank_s *bank, int set, int first, int last);
+static int tms470_write(struct flash_bank_s *bank, u8 * buffer, u32 offset, u32 count);
+static int tms470_probe(struct flash_bank_s *bank);
+static int tms470_auto_probe(struct flash_bank_s *bank);
+static int tms470_erase_check(struct flash_bank_s *bank);
+static int tms470_protect_check(struct flash_bank_s *bank);
+static int tms470_info(struct flash_bank_s *bank, char *buf, int buf_size);
flash_driver_t tms470_flash = {
.name = "tms470",
/* ---------------------------------------------------------------------- */
-int tms470_read_part_info(struct flash_bank_s *bank)
+static int tms470_read_part_info(struct flash_bank_s *bank)
{
tms470_flash_bank_t *tms470_info = bank->driver_priv;
target_t *target = bank->target;
/* ---------------------------------------------------------------------- */
-u32 keysSet = 0;
-u32 flashKeys[4];
+static u32 keysSet = 0;
+static u32 flashKeys[4];
-int tms470_handle_flash_keyset_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc)
+static int tms470_handle_flash_keyset_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc)
{
if (argc > 4)
{
return ERROR_OK;
}
-const u32 FLASH_KEYS_ALL_ONES[] = { 0xFFFFFFFF, 0xFFFFFFFF,
+static const u32 FLASH_KEYS_ALL_ONES[] = { 0xFFFFFFFF, 0xFFFFFFFF,
0xFFFFFFFF, 0xFFFFFFFF,
};
-const u32 FLASH_KEYS_ALL_ZEROS[] = { 0x00000000, 0x00000000,
+static const u32 FLASH_KEYS_ALL_ZEROS[] = { 0x00000000, 0x00000000,
0x00000000, 0x00000000,
};
-const u32 FLASH_KEYS_MIX1[] = { 0xf0fff0ff, 0xf0fff0ff,
+static const u32 FLASH_KEYS_MIX1[] = { 0xf0fff0ff, 0xf0fff0ff,
0xf0fff0ff, 0xf0fff0ff
};
-const u32 FLASH_KEYS_MIX2[] = { 0x0000ffff, 0x0000ffff,
+static const u32 FLASH_KEYS_MIX2[] = { 0x0000ffff, 0x0000ffff,
0x0000ffff, 0x0000ffff
};
/* ---------------------------------------------------------------------- */
-int oscMHz = 12;
+static int oscMHz = 12;
-int tms470_handle_osc_megahertz_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc)
+static int tms470_handle_osc_megahertz_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc)
{
if (argc > 1)
{
/* ---------------------------------------------------------------------- */
-int plldis = 0;
+static int plldis = 0;
-int tms470_handle_plldis_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc)
+static int tms470_handle_plldis_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc)
{
if (argc > 1)
{
/* ---------------------------------------------------------------------- */
-int tms470_check_flash_unlocked(target_t * target)
+static int tms470_check_flash_unlocked(target_t * target)
{
u32 fmbbusy;
/* ---------------------------------------------------------------------- */
-int tms470_try_flash_keys(target_t * target, const u32 * key_set)
+static int tms470_try_flash_keys(target_t * target, const u32 * key_set)
{
u32 glbctrl, fmmstat;
int retval = ERROR_FLASH_OPERATION_FAILED;
/* ---------------------------------------------------------------------- */
-int tms470_unlock_flash(struct flash_bank_s *bank)
+static int tms470_unlock_flash(struct flash_bank_s *bank)
{
target_t *target = bank->target;
const u32 *p_key_sets[5];
/* ---------------------------------------------------------------------- */
-int tms470_flash_initialize_internal_state_machine(struct flash_bank_s *bank)
+static int tms470_flash_initialize_internal_state_machine(struct flash_bank_s *bank)
{
u32 fmmac2, fmmac1, fmmaxep, k, delay, glbctrl, sysclk;
target_t *target = bank->target;
/* ---------------------------------------------------------------------- */
-int tms470_erase_sector(struct flash_bank_s *bank, int sector)
+static int tms470_erase_sector(struct flash_bank_s *bank, int sector)
{
u32 glbctrl, orig_fmregopt, fmbsea, fmbseb, fmmstat;
target_t *target = bank->target;
Implementation of Flash Driver Interfaces
---------------------------------------------------------------------- */
-int tms470_register_commands(struct command_context_s *cmd_ctx)
+static int tms470_register_commands(struct command_context_s *cmd_ctx)
{
command_t *tms470_cmd = register_command(cmd_ctx, NULL, "tms470", NULL, COMMAND_ANY, "applies to TI tms470 family");
/* ---------------------------------------------------------------------- */
-int tms470_erase(struct flash_bank_s *bank, int first, int last)
+static int tms470_erase(struct flash_bank_s *bank, int first, int last)
{
tms470_flash_bank_t *tms470_info = bank->driver_priv;
int sector, result = ERROR_OK;
/* ---------------------------------------------------------------------- */
-int tms470_protect(struct flash_bank_s *bank, int set, int first, int last)
+static int tms470_protect(struct flash_bank_s *bank, int set, int first, int last)
{
tms470_flash_bank_t *tms470_info = bank->driver_priv;
target_t *target = bank->target;
/* ---------------------------------------------------------------------- */
-int tms470_write(struct flash_bank_s *bank, u8 * buffer, u32 offset, u32 count)
+static int tms470_write(struct flash_bank_s *bank, u8 * buffer, u32 offset, u32 count)
{
target_t *target = bank->target;
u32 glbctrl, fmbac2, orig_fmregopt, fmbsea, fmbseb, fmmaxpp, fmmstat;
/* ---------------------------------------------------------------------- */
-int tms470_probe(struct flash_bank_s *bank)
+static int tms470_probe(struct flash_bank_s *bank)
{
if (bank->target->state != TARGET_HALTED)
{
return tms470_read_part_info(bank);
}
-int tms470_auto_probe(struct flash_bank_s *bank)
+static int tms470_auto_probe(struct flash_bank_s *bank)
{
tms470_flash_bank_t *tms470_info = bank->driver_priv;
/* ---------------------------------------------------------------------- */
-int tms470_erase_check(struct flash_bank_s *bank)
+static int tms470_erase_check(struct flash_bank_s *bank)
{
target_t *target = bank->target;
tms470_flash_bank_t *tms470_info = bank->driver_priv;
/* ---------------------------------------------------------------------- */
-int tms470_protect_check(struct flash_bank_s *bank)
+static int tms470_protect_check(struct flash_bank_s *bank)
{
target_t *target = bank->target;
tms470_flash_bank_t *tms470_info = bank->driver_priv;
/* ---------------------------------------------------------------------- */
-int tms470_info(struct flash_bank_s *bank, char *buf, int buf_size)
+static int tms470_info(struct flash_bank_s *bank, char *buf, int buf_size)
{
int used = 0;
tms470_flash_bank_t *tms470_info = bank->driver_priv;
* [options...]
*/
-int tms470_flash_bank_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc, struct flash_bank_s *bank)
+static int tms470_flash_bank_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc, struct flash_bank_s *bank)
{
bank->driver_priv = malloc(sizeof(tms470_flash_bank_t));
fields[field_count++].in_handler_priv = NULL;
}
- jtag_add_dr_scan(num_fields, fields, -1);
+ jtag_add_dr_scan(num_fields, fields, TAP_INVALID);
retval = jtag_execute_queue();
if (retval != ERROR_OK)
{
#ifdef _DEBUG_JTAG_IO_
LOG_DEBUG("end_state: %i", cmd->cmd.end_state->end_state);
#endif
- if (cmd->cmd.end_state->end_state != -1)
+ if (cmd->cmd.end_state->end_state != TAP_INVALID)
amt_jtagaccel_end_state(cmd->cmd.end_state->end_state);
break;
case JTAG_RESET:
#ifdef _DEBUG_JTAG_IO_
LOG_DEBUG("runtest %i cycles, end in %i", cmd->cmd.runtest->num_cycles, cmd->cmd.runtest->end_state);
#endif
- if (cmd->cmd.runtest->end_state != -1)
+ if (cmd->cmd.runtest->end_state != TAP_INVALID)
amt_jtagaccel_end_state(cmd->cmd.runtest->end_state);
amt_jtagaccel_runtest(cmd->cmd.runtest->num_cycles);
break;
#ifdef _DEBUG_JTAG_IO_
LOG_DEBUG("statemove end in %i", cmd->cmd.statemove->end_state);
#endif
- if (cmd->cmd.statemove->end_state != -1)
+ if (cmd->cmd.statemove->end_state != TAP_INVALID)
amt_jtagaccel_end_state(cmd->cmd.statemove->end_state);
amt_jtagaccel_state_move();
break;
#ifdef _DEBUG_JTAG_IO_
LOG_DEBUG("scan end in %i", cmd->cmd.scan->end_state);
#endif
- if (cmd->cmd.scan->end_state != -1)
+ if (cmd->cmd.scan->end_state != TAP_INVALID)
amt_jtagaccel_end_state(cmd->cmd.scan->end_state);
scan_size = jtag_build_buffer(cmd->cmd.scan, &buffer);
type = jtag_scan_type(cmd->cmd.scan);
case JTAG_END_STATE:
DEBUG_JTAG_IO("end_state: %i", cmd->cmd.end_state->end_state);
- if (cmd->cmd.end_state->end_state != -1)
+ if (cmd->cmd.end_state->end_state != TAP_INVALID)
{
armjtagew_end_state(cmd->cmd.end_state->end_state);
}
DEBUG_JTAG_IO( "runtest %i cycles, end in %i", cmd->cmd.runtest->num_cycles, \
cmd->cmd.runtest->end_state);
- if (cmd->cmd.runtest->end_state != -1)
+ if (cmd->cmd.runtest->end_state != TAP_INVALID)
{
armjtagew_end_state(cmd->cmd.runtest->end_state);
}
case JTAG_STATEMOVE:
DEBUG_JTAG_IO("statemove end in %i", cmd->cmd.statemove->end_state);
- if (cmd->cmd.statemove->end_state != -1)
+ if (cmd->cmd.statemove->end_state != TAP_INVALID)
{
armjtagew_end_state(cmd->cmd.statemove->end_state);
}
case JTAG_SCAN:
DEBUG_JTAG_IO("scan end in %i", cmd->cmd.scan->end_state);
- if (cmd->cmd.scan->end_state != -1)
+ if (cmd->cmd.scan->end_state != TAP_INVALID)
{
armjtagew_end_state(cmd->cmd.scan->end_state);
}
#ifdef _DEBUG_JTAG_IO_
LOG_DEBUG("end_state: %s", tap_state_name(cmd->cmd.end_state->end_state) );
#endif
- if (cmd->cmd.end_state->end_state != -1)
+ if (cmd->cmd.end_state->end_state != TAP_INVALID)
bitbang_end_state(cmd->cmd.end_state->end_state);
break;
case JTAG_RESET:
#ifdef _DEBUG_JTAG_IO_
LOG_DEBUG("runtest %i cycles, end in %s", cmd->cmd.runtest->num_cycles, tap_state_name(cmd->cmd.runtest->end_state) );
#endif
- if (cmd->cmd.runtest->end_state != -1)
+ if (cmd->cmd.runtest->end_state != TAP_INVALID)
bitbang_end_state(cmd->cmd.runtest->end_state);
bitbang_runtest(cmd->cmd.runtest->num_cycles);
break;
#ifdef _DEBUG_JTAG_IO_
LOG_DEBUG("statemove end in %s", tap_state_name(cmd->cmd.statemove->end_state));
#endif
- if (cmd->cmd.statemove->end_state != -1)
+ if (cmd->cmd.statemove->end_state != TAP_INVALID)
bitbang_end_state(cmd->cmd.statemove->end_state);
bitbang_state_move();
break;
#ifdef _DEBUG_JTAG_IO_
LOG_DEBUG("%s scan end in %s", (cmd->cmd.scan->ir_scan) ? "IR" : "DR", tap_state_name(cmd->cmd.scan->end_state) );
#endif
- if (cmd->cmd.scan->end_state != -1)
+ if (cmd->cmd.scan->end_state != TAP_INVALID)
bitbang_end_state(cmd->cmd.scan->end_state);
scan_size = jtag_build_buffer(cmd->cmd.scan, &buffer);
type = jtag_scan_type(cmd->cmd.scan);
void bitq_end_state(tap_state_t state)
{
- if (state==-1)
+ if (state==TAP_INVALID)
return;
if (!tap_is_state_stable(state))
switch (cmd->type)
{
case JTAG_END_STATE:
- if (cmd->cmd.end_state->end_state != -1)
+ if (cmd->cmd.end_state->end_state != TAP_INVALID)
ft2232_end_state(cmd->cmd.end_state->end_state);
break;
if (tap_get_state() != TAP_IDLE)
predicted_size += 3;
predicted_size += 3 * CEIL(cmd->cmd.runtest->num_cycles, 7);
- if ( (cmd->cmd.runtest->end_state != -1) && (cmd->cmd.runtest->end_state != TAP_IDLE) )
+ if ( (cmd->cmd.runtest->end_state != TAP_INVALID) && (cmd->cmd.runtest->end_state != TAP_IDLE) )
predicted_size += 3;
- if ( (cmd->cmd.runtest->end_state == -1) && (tap_get_end_state() != TAP_IDLE) )
+ if ( (cmd->cmd.runtest->end_state == TAP_INVALID) && (tap_get_end_state() != TAP_IDLE) )
predicted_size += 3;
if (ft2232_buffer_size + predicted_size + 1 > FT2232_BUFFER_SIZE)
{
/* LOG_DEBUG("added TMS scan (no read)"); */
}
- if (cmd->cmd.runtest->end_state != -1)
+ if (cmd->cmd.runtest->end_state != TAP_INVALID)
ft2232_end_state(cmd->cmd.runtest->end_state);
if ( tap_get_state() != tap_get_end_state() )
require_send = 0;
first_unsent = cmd;
}
- if (cmd->cmd.statemove->end_state != -1)
+ if (cmd->cmd.statemove->end_state != TAP_INVALID)
ft2232_end_state(cmd->cmd.statemove->end_state);
/* command "Clock Data to TMS/CS Pin (no Read)" */
retval = ERROR_JTAG_QUEUE_FAILED;
/* current command */
- if (cmd->cmd.scan->end_state != -1)
+ if (cmd->cmd.scan->end_state != TAP_INVALID)
ft2232_end_state(cmd->cmd.scan->end_state);
ft2232_large_scan(cmd->cmd.scan, type, buffer, scan_size);
require_send = 0;
}
ft2232_expect_read += ft2232_predict_scan_in(scan_size, type);
/* LOG_DEBUG("new read size: %i", ft2232_expect_read); */
- if (cmd->cmd.scan->end_state != -1)
+ if (cmd->cmd.scan->end_state != TAP_INVALID)
ft2232_end_state(cmd->cmd.scan->end_state);
ft2232_add_scan(cmd->cmd.scan->ir_scan, type, buffer, scan_size);
require_send = 1;
#ifdef _DEBUG_JTAG_IO_
LOG_DEBUG("end_state: %i", cmd->cmd.end_state->end_state);
#endif
- if (cmd->cmd.end_state->end_state != -1)
+ if (cmd->cmd.end_state->end_state != TAP_INVALID)
gw16012_end_state(cmd->cmd.end_state->end_state);
break;
case JTAG_RESET:
#ifdef _DEBUG_JTAG_IO_
LOG_DEBUG("runtest %i cycles, end in %i", cmd->cmd.runtest->num_cycles, cmd->cmd.runtest->end_state);
#endif
- if (cmd->cmd.runtest->end_state != -1)
+ if (cmd->cmd.runtest->end_state != TAP_INVALID)
gw16012_end_state(cmd->cmd.runtest->end_state);
gw16012_runtest(cmd->cmd.runtest->num_cycles);
break;
#ifdef _DEBUG_JTAG_IO_
LOG_DEBUG("statemove end in %i", cmd->cmd.statemove->end_state);
#endif
- if (cmd->cmd.statemove->end_state != -1)
+ if (cmd->cmd.statemove->end_state != TAP_INVALID)
gw16012_end_state(cmd->cmd.statemove->end_state);
gw16012_state_move();
break;
gw16012_path_move(cmd->cmd.pathmove);
break;
case JTAG_SCAN:
- if (cmd->cmd.scan->end_state != -1)
+ if (cmd->cmd.scan->end_state != TAP_INVALID)
gw16012_end_state(cmd->cmd.scan->end_state);
scan_size = jtag_build_buffer(cmd->cmd.scan, &buffer);
type = jtag_scan_type(cmd->cmd.scan);
case JTAG_END_STATE:
DEBUG_JTAG_IO("end_state: %i", cmd->cmd.end_state->end_state);
- if (cmd->cmd.end_state->end_state != -1)
+ if (cmd->cmd.end_state->end_state != TAP_INVALID)
{
jlink_end_state(cmd->cmd.end_state->end_state);
}
DEBUG_JTAG_IO( "runtest %i cycles, end in %i", cmd->cmd.runtest->num_cycles, \
cmd->cmd.runtest->end_state);
- if (cmd->cmd.runtest->end_state != -1)
+ if (cmd->cmd.runtest->end_state != TAP_INVALID)
{
jlink_end_state(cmd->cmd.runtest->end_state);
}
case JTAG_STATEMOVE:
DEBUG_JTAG_IO("statemove end in %i", cmd->cmd.statemove->end_state);
- if (cmd->cmd.statemove->end_state != -1)
+ if (cmd->cmd.statemove->end_state != TAP_INVALID)
{
jlink_end_state(cmd->cmd.statemove->end_state);
}
case JTAG_SCAN:
DEBUG_JTAG_IO("scan end in %i", cmd->cmd.scan->end_state);
- if (cmd->cmd.scan->end_state != -1)
+ if (cmd->cmd.scan->end_state != TAP_INVALID)
{
jlink_end_state(cmd->cmd.scan->end_state);
}
if (result == len)
{
usb_in_buffer[result] = 0;
- LOG_INFO(usb_in_buffer);
+ LOG_INFO((char *)usb_in_buffer);
return ERROR_OK;
}
}
return -1;
}
- result = usb_bulk_write(jlink_jtag->usb_handle, JLINK_WRITE_ENDPOINT, \
- usb_out_buffer, out_length, JLINK_USB_TIMEOUT);
+ result = usb_bulk_write(jlink_jtag->usb_handle, JLINK_WRITE_ENDPOINT,
+ (char *)usb_out_buffer, out_length, JLINK_USB_TIMEOUT);
DEBUG_JTAG_IO("jlink_usb_write, out_length = %d, result = %d", out_length, result);
/* Read data from USB into in_buffer. */
int jlink_usb_read(jlink_jtag_t *jlink_jtag)
{
- int result = usb_bulk_read(jlink_jtag->usb_handle, JLINK_READ_ENDPOINT, \
- usb_in_buffer, JLINK_IN_BUFFER_SIZE, JLINK_USB_TIMEOUT);
+ int result = usb_bulk_read(jlink_jtag->usb_handle, JLINK_READ_ENDPOINT,
+ (char *)usb_in_buffer, JLINK_IN_BUFFER_SIZE, JLINK_USB_TIMEOUT);
DEBUG_JTAG_IO("jlink_usb_read, result = %d", result);
/* Read the result from the previous EMU cmd into result_buffer. */
int jlink_usb_read_emu_result(jlink_jtag_t *jlink_jtag)
{
- int result = usb_bulk_read(jlink_jtag->usb_handle, JLINK_READ_ENDPOINT, \
- usb_emu_result_buffer, JLINK_EMU_RESULT_BUFFER_SIZE, JLINK_USB_TIMEOUT);
+ int result = usb_bulk_read(jlink_jtag->usb_handle, JLINK_READ_ENDPOINT,
+ (char *)usb_emu_result_buffer, JLINK_EMU_RESULT_BUFFER_SIZE,
+ JLINK_USB_TIMEOUT);
DEBUG_JTAG_IO("jlink_usb_read_result, result = %d", result);
{
jtag_prelude1();
- if (state != -1)
+ if (state != TAP_INVALID)
jtag_add_end_state(state);
cmd_queue_cur_state = cmd_queue_end_state;
return ERROR_COMMAND_SYNTAX_ERROR;
}
- jtag_add_runtest(strtol(args[0], NULL, 0), -1);
+ jtag_add_runtest(strtol(args[0], NULL, 0), TAP_INVALID);
jtag_execute_queue();
return ERROR_OK;
/* "statename" */
/* at the end of the arguments. */
/* assume none. */
- endstate = -1;
+ endstate = TAP_INVALID;
if( argc >= 4 ){
/* have at least one pair of numbers. */
/* is last pair the magic text? */
const char *cpA;
const char *cpS;
cpA = args[ argc-1 ];
- for( endstate = 0 ; endstate < 16 ; endstate++ ){
+ for( endstate = 0 ; endstate < TAP_NUM_STATES ; endstate++ ){
cpS = tap_state_name( endstate );
if( 0 == strcmp( cpA, cpS ) ){
break;
}
}
- if( endstate >= 16 ){
+ if( endstate >= TAP_NUM_STATES ){
return ERROR_COMMAND_SYNTAX_ERROR;
} else {
/* found - remove the last 2 args */
fields[i].in_handler_priv = NULL;
}
- jtag_add_ir_scan(argc / 2, fields, -1);
+ jtag_add_ir_scan(argc / 2, fields, TAP_INVALID);
/* did we have an endstate? */
- if( endstate >= 0 ){
+ if (endstate != TAP_INVALID)
jtag_add_end_state(endstate);
- }
+
jtag_execute_queue();
for (i = 0; i < argc / 2; i++)
}
/* assume no endstate */
- endstate = -1;
+ endstate = TAP_INVALID;
/* validate arguments as numbers */
e = JIM_OK;
for (i = 2; i < argc; i+=2)
fields[field_count++].in_handler_priv = NULL;
}
- jtag_add_dr_scan(num_fields, fields, -1);
+ jtag_add_dr_scan(num_fields, fields, TAP_INVALID);
/* did we get an end state? */
- if( endstate >= 0 ){
- jtag_add_end_state( (tap_state_t)endstate );
- }
+ if (endstate != TAP_INVALID)
+ jtag_add_end_state(endstate);
+
retval = jtag_execute_queue();
if (retval != ERROR_OK)
{
*
* DRSHIFT->DRSHIFT and IRSHIFT->IRSHIFT have to be caught in interface specific code
*/
- const static u8 tms_seqs[6][6] =
+ static const u8 tms_seqs[6][6] =
{
/* value clocked to TMS to move from one of six stable states to another */
{
int x;
- for( x = 0 ; x < 16 ; x++ ){
+ for( x = 0 ; x < TAP_NUM_STATES ; x++ ){
/* be nice to the human */
if( 0 == strcasecmp( name, tap_state_name(x) ) ){
return x;
}
}
/* not found */
- return -1;
+ return TAP_INVALID;
}
/*-----</Cable Helper API>--------------------------------------*/
TAP_DRSELECT = 1, TAP_DRCAPTURE = 2, TAP_DRSHIFT = 3, TAP_DREXIT1 = 4,
TAP_DRPAUSE = 5, TAP_DREXIT2 = 6, TAP_DRUPDATE = 7,
TAP_IRSELECT = 9, TAP_IRCAPTURE = 10, TAP_IRSHIFT = 11, TAP_IREXIT1 = 12,
- TAP_IRPAUSE = 13, TAP_IREXIT2 = 14, TAP_IRUPDATE = 15
+ TAP_IRPAUSE = 13, TAP_IREXIT2 = 14, TAP_IRUPDATE = 15,
+
+ TAP_NUM_STATES = 16, TAP_INVALID = -1,
};
typedef enum tap_state tap_state_t;
/* jtag_add_dr_out() is a faster version of jtag_add_dr_scan()
*
- * Current or end_state can not be TAP_RESET. end_state can be -1
+ * Current or end_state can not be TAP_RESET. end_state can be TAP_INVALID
*
* num_bits[i] is the number of bits to clock out from value[i] LSB first.
*
static __inline__ void jtag_add_dr_out(jtag_tap_t* tap, int num_fields, const int* num_bits, const u32* value,
tap_state_t end_state)
{
- if (end_state != -1)
+ if (end_state != TAP_INVALID)
cmd_queue_end_state = end_state;
cmd_queue_cur_state = cmd_queue_end_state;
interface_jtag_add_dr_out(tap, num_fields, num_bits, value, cmd_queue_end_state);
#ifdef _DEBUG_JTAG_IO_
LOG_DEBUG("end_state: %i", cmd->cmd.end_state->end_state);
#endif
- if (cmd->cmd.end_state->end_state != -1)
+ if (cmd->cmd.end_state->end_state != TAP_INVALID)
usbprog_end_state(cmd->cmd.end_state->end_state);
break;
case JTAG_RESET:
#ifdef _DEBUG_JTAG_IO_
LOG_DEBUG("runtest %i cycles, end in %i", cmd->cmd.runtest->num_cycles, cmd->cmd.runtest->end_state);
#endif
- if (cmd->cmd.runtest->end_state != -1)
+ if (cmd->cmd.runtest->end_state != TAP_INVALID)
usbprog_end_state(cmd->cmd.runtest->end_state);
usbprog_runtest(cmd->cmd.runtest->num_cycles);
break;
#ifdef _DEBUG_JTAG_IO_
LOG_DEBUG("statemove end in %i", cmd->cmd.statemove->end_state);
#endif
- if (cmd->cmd.statemove->end_state != -1)
+ if (cmd->cmd.statemove->end_state != TAP_INVALID)
usbprog_end_state(cmd->cmd.statemove->end_state);
usbprog_state_move();
break;
#ifdef _DEBUG_JTAG_IO_
LOG_DEBUG("scan end in %i", cmd->cmd.scan->end_state);
#endif
- if (cmd->cmd.scan->end_state != -1)
+ if (cmd->cmd.scan->end_state != TAP_INVALID)
usbprog_end_state(cmd->cmd.scan->end_state);
scan_size = jtag_build_buffer(cmd->cmd.scan, &buffer);
type = jtag_scan_type(cmd->cmd.scan);
case JTAG_END_STATE:
DEBUG_JTAG_IO("end_state: %s", tap_state_name(cmd->cmd.end_state->end_state));
- if (cmd->cmd.end_state->end_state != -1)
+ if (cmd->cmd.end_state->end_state != TAP_INVALID)
{
vsllink_end_state(cmd->cmd.end_state->end_state);
}
DEBUG_JTAG_IO( "runtest %i cycles, end in %s", cmd->cmd.runtest->num_cycles, \
tap_state_name(cmd->cmd.runtest->end_state));
- if (cmd->cmd.runtest->end_state != -1)
+ if (cmd->cmd.runtest->end_state != TAP_INVALID)
{
vsllink_end_state(cmd->cmd.runtest->end_state);
}
case JTAG_STATEMOVE:
DEBUG_JTAG_IO("statemove end in %s", tap_state_name(cmd->cmd.statemove->end_state));
- if (cmd->cmd.statemove->end_state != -1)
+ if (cmd->cmd.statemove->end_state != TAP_INVALID)
{
vsllink_end_state(cmd->cmd.statemove->end_state);
}
break;
case JTAG_SCAN:
- if (cmd->cmd.scan->end_state != -1)
+ if (cmd->cmd.scan->end_state != TAP_INVALID)
{
vsllink_end_state(cmd->cmd.scan->end_state);
}
if (R(DSCR) & ARM11_DSCR_WDTR_FULL)
{
- arm11_add_debug_SCAN_N(arm11, 0x05, -1);
+ arm11_add_debug_SCAN_N(arm11, 0x05, TAP_INVALID);
- arm11_add_IR(arm11, ARM11_INTEST, -1);
+ arm11_add_IR(arm11, ARM11_INTEST, TAP_INVALID);
scan_field_t chain5_fields[3];
if (R(DSCR) & ARM11_DSCR_RDTR_FULL || arm11->reg_list[ARM11_RC_RDTR].dirty)
{
- arm11_add_debug_SCAN_N(arm11, 0x05, -1);
+ arm11_add_debug_SCAN_N(arm11, 0x05, TAP_INVALID);
- arm11_add_IR(arm11, ARM11_EXTEST, -1);
+ arm11_add_IR(arm11, ARM11_EXTEST, TAP_INVALID);
scan_field_t chain5_fields[3];
/* check IDCODE */
- arm11_add_IR(arm11, ARM11_IDCODE, -1);
+ arm11_add_IR(arm11, ARM11_IDCODE, TAP_INVALID);
scan_field_t idcode_field;
/* check DIDR */
- arm11_add_debug_SCAN_N(arm11, 0x00, -1);
+ arm11_add_debug_SCAN_N(arm11, 0x00, TAP_INVALID);
- arm11_add_IR(arm11, ARM11_INTEST, -1);
+ arm11_add_IR(arm11, ARM11_INTEST, TAP_INVALID);
scan_field_t chain0_fields[2];
*
* \param arm11 Target state variable.
* \param instr An ARM11 DBGTAP instruction. Use enum #arm11_instructions.
- * \param state Pass the final TAP state or -1 for the default value (Pause-IR).
+ * \param state Pass the final TAP state or TAP_INVALID for the default value (Pause-IR).
*
* \remarks This adds to the JTAG command queue but does \em not execute it.
*/
arm11_setup_field(arm11, 5, &instr, NULL, &field);
- arm11_add_ir_scan_vc(1, &field, state == -1 ? TAP_IRPAUSE : state);
+ arm11_add_ir_scan_vc(1, &field, state == TAP_INVALID ? TAP_IRPAUSE : state);
}
/** Verify shifted out data from Scan Chain Register (SCREG)
*
* \param arm11 Target state variable.
* \param chain Scan chain that will be selected.
- * \param state Pass the final TAP state or -1 for the default
+ * \param state Pass the final TAP state or TAP_INVALID for the default
* value (Pause-DR).
*
* The chain takes effect when Update-DR is passed (usually when subsequently
{
JTAG_DEBUG("SCREG <= 0x%02x", chain);
- arm11_add_IR(arm11, ARM11_SCAN_N, -1);
+ arm11_add_IR(arm11, ARM11_SCAN_N, TAP_INVALID);
scan_field_t field;
field.in_handler = arm11_in_handler_SCAN_N;
- arm11_add_dr_scan_vc(1, &field, state == -1 ? TAP_DRPAUSE : state);
+ arm11_add_dr_scan_vc(1, &field, state == TAP_INVALID ? TAP_DRPAUSE : state);
}
/** Write an instruction into the ITR register
* \param inst An ARM11 processor instruction/opcode.
* \param flag Optional parameter to retrieve the InstCompl flag
* (this will be written when the JTAG chain is executed).
- * \param state Pass the final TAP state or -1 for the default
+ * \param state Pass the final TAP state or TAP_INVALID for the default
* value (Run-Test/Idle).
*
* \remarks By default this ends with Run-Test/Idle state
arm11_setup_field(arm11, 32, &inst, NULL, itr + 0);
arm11_setup_field(arm11, 1, NULL, flag, itr + 1);
- arm11_add_dr_scan_vc(asizeof(itr), itr, state == -1 ? TAP_IDLE : state);
+ arm11_add_dr_scan_vc(asizeof(itr), itr, state == TAP_INVALID ? TAP_IDLE : state);
}
/** Read the Debug Status and Control Register (DSCR)
*/
u32 arm11_read_DSCR(arm11_common_t * arm11)
{
- arm11_add_debug_SCAN_N(arm11, 0x01, -1);
+ arm11_add_debug_SCAN_N(arm11, 0x01, TAP_INVALID);
- arm11_add_IR(arm11, ARM11_INTEST, -1);
+ arm11_add_IR(arm11, ARM11_INTEST, TAP_INVALID);
u32 dscr;
scan_field_t chain1_field;
*/
void arm11_write_DSCR(arm11_common_t * arm11, u32 dscr)
{
- arm11_add_debug_SCAN_N(arm11, 0x01, -1);
+ arm11_add_debug_SCAN_N(arm11, 0x01, TAP_INVALID);
- arm11_add_IR(arm11, ARM11_EXTEST, -1);
+ arm11_add_IR(arm11, ARM11_EXTEST, TAP_INVALID);
scan_field_t chain1_field;
*/
void arm11_run_instr_data_prepare(arm11_common_t * arm11)
{
- arm11_add_debug_SCAN_N(arm11, 0x05, -1);
+ arm11_add_debug_SCAN_N(arm11, 0x05, TAP_INVALID);
}
/** Cleanup after ITR/DTR operations
*/
void arm11_run_instr_data_finish(arm11_common_t * arm11)
{
- arm11_add_debug_SCAN_N(arm11, 0x00, -1);
+ arm11_add_debug_SCAN_N(arm11, 0x00, TAP_INVALID);
}
*/
void arm11_run_instr_no_data(arm11_common_t * arm11, u32 * opcode, size_t count)
{
- arm11_add_IR(arm11, ARM11_ITRSEL, -1);
+ arm11_add_IR(arm11, ARM11_ITRSEL, TAP_INVALID);
while (count--)
{
*/
void arm11_run_instr_data_to_core(arm11_common_t * arm11, u32 opcode, u32 * data, size_t count)
{
- arm11_add_IR(arm11, ARM11_ITRSEL, -1);
+ arm11_add_IR(arm11, ARM11_ITRSEL, TAP_INVALID);
arm11_add_debug_INST(arm11, opcode, NULL, TAP_DRPAUSE);
- arm11_add_IR(arm11, ARM11_EXTEST, -1);
+ arm11_add_IR(arm11, ARM11_EXTEST, TAP_INVALID);
scan_field_t chain5_fields[3];
data++;
}
- arm11_add_IR(arm11, ARM11_INTEST, -1);
+ arm11_add_IR(arm11, ARM11_INTEST, TAP_INVALID);
do
{
*/
void arm11_run_instr_data_to_core_noack(arm11_common_t * arm11, u32 opcode, u32 * data, size_t count)
{
- arm11_add_IR(arm11, ARM11_ITRSEL, -1);
+ arm11_add_IR(arm11, ARM11_ITRSEL, TAP_INVALID);
arm11_add_debug_INST(arm11, opcode, NULL, TAP_DRPAUSE);
- arm11_add_IR(arm11, ARM11_EXTEST, -1);
+ arm11_add_IR(arm11, ARM11_EXTEST, TAP_INVALID);
scan_field_t chain5_fields[3];
}
}
- arm11_add_IR(arm11, ARM11_INTEST, -1);
+ arm11_add_IR(arm11, ARM11_INTEST, TAP_INVALID);
chain5_fields[0].out_value = 0;
chain5_fields[1].in_value = ReadyPos++;
*/
void arm11_run_instr_data_from_core(arm11_common_t * arm11, u32 opcode, u32 * data, size_t count)
{
- arm11_add_IR(arm11, ARM11_ITRSEL, -1);
+ arm11_add_IR(arm11, ARM11_ITRSEL, TAP_INVALID);
arm11_add_debug_INST(arm11, opcode, NULL, TAP_IDLE);
- arm11_add_IR(arm11, ARM11_INTEST, -1);
+ arm11_add_IR(arm11, ARM11_INTEST, TAP_INVALID);
scan_field_t chain5_fields[3];
*/
void arm11_sc7_run(arm11_common_t * arm11, arm11_sc7_action_t * actions, size_t count)
{
- arm11_add_debug_SCAN_N(arm11, 0x07, -1);
+ arm11_add_debug_SCAN_N(arm11, 0x07, TAP_INVALID);
- arm11_add_IR(arm11, ARM11_EXTEST, -1);
+ arm11_add_IR(arm11, ARM11_EXTEST, TAP_INVALID);
scan_field_t chain7_fields[3];
fields[1].in_check_value = NULL;
fields[1].in_check_mask = NULL;
- jtag_add_dr_scan(2, fields, -1);
+ jtag_add_dr_scan(2, fields, TAP_INVALID);
if (clock)
- jtag_add_runtest(0, -1);
+ jtag_add_runtest(0, TAP_INVALID);
#ifdef _DEBUG_INSTRUCTION_EXECUTION_
if((retval = jtag_execute_queue()) != ERROR_OK)
2,
arm7tdmi_num_bits,
values,
- -1);
+ TAP_INVALID);
- jtag_add_runtest(0, -1);
+ jtag_add_runtest(0, TAP_INVALID);
return ERROR_OK;
}
fields[1].in_check_value = NULL;
fields[1].in_check_mask = NULL;
- jtag_add_dr_scan(2, fields, -1);
+ jtag_add_dr_scan(2, fields, TAP_INVALID);
- jtag_add_runtest(0, -1);
+ jtag_add_runtest(0, TAP_INVALID);
#ifdef _DEBUG_INSTRUCTION_EXECUTION_
{
fields[1].in_check_value = NULL;
fields[1].in_check_mask = NULL;
- jtag_add_dr_scan(2, fields, -1);
+ jtag_add_dr_scan(2, fields, TAP_INVALID);
- jtag_add_runtest(0, -1);
+ jtag_add_runtest(0, TAP_INVALID);
#ifdef _DEBUG_INSTRUCTION_EXECUTION_
{
fields[3].in_handler = NULL;
fields[3].in_handler_priv = NULL;
- jtag_add_dr_scan(4, fields, -1);
+ jtag_add_dr_scan(4, fields, TAP_INVALID);
fields[1].in_handler_priv = value;
fields[1].in_handler = arm_jtag_buf_to_u32;
- jtag_add_dr_scan(4, fields, -1);
+ jtag_add_dr_scan(4, fields, TAP_INVALID);
#ifdef _DEBUG_INSTRUCTION_EXECUTION_
jtag_execute_queue();
fields[3].in_handler = NULL;
fields[3].in_handler_priv = NULL;
- jtag_add_dr_scan(4, fields, -1);
+ jtag_add_dr_scan(4, fields, TAP_INVALID);
#ifdef _DEBUG_INSTRUCTION_EXECUTION_
LOG_DEBUG("addr: 0x%x value: %8.8x", reg_addr, value);
fields[3].in_handler = NULL;
fields[3].in_handler_priv = NULL;
- jtag_add_dr_scan(4, fields, -1);
+ jtag_add_dr_scan(4, fields, TAP_INVALID);
arm9tdmi_clock_out(jtag_info, arm_opcode, 0, NULL, 0);
arm9tdmi_clock_out(jtag_info, ARMV4_5_NOP, 0, NULL, 1);
fields[3].in_handler = NULL;
fields[3].in_handler_priv = NULL;
- jtag_add_dr_scan(4, fields, -1);
+ jtag_add_dr_scan(4, fields, TAP_INVALID);
fields[0].in_handler_priv = value;
fields[0].in_handler = arm_jtag_buf_to_u32;
/* rescan with NOP, to wait for the access to complete */
access = 0;
nr_w_buf = 0;
- jtag_add_dr_scan(4, fields, -1);
+ jtag_add_dr_scan(4, fields, TAP_INVALID);
if((retval = jtag_execute_queue()) != ERROR_OK)
{
return retval;
fields[3].in_handler = NULL;
fields[3].in_handler_priv = NULL;
- jtag_add_dr_scan(4, fields, -1);
+ jtag_add_dr_scan(4, fields, TAP_INVALID);
/*TODO: add timeout*/
do
{
/* rescan with NOP, to wait for the access to complete */
access = 0;
nr_w_buf = 0;
- jtag_add_dr_scan(4, fields, -1);
+ jtag_add_dr_scan(4, fields, TAP_INVALID);
if((retval = jtag_execute_queue()) != ERROR_OK)
{
return retval;
fields[2].in_handler = NULL;
fields[2].in_handler_priv = NULL;
- jtag_add_dr_scan(3, fields, -1);
+ jtag_add_dr_scan(3, fields, TAP_INVALID);
fields[0].in_handler_priv = value;
fields[0].in_handler = arm_jtag_buf_to_u32;
- jtag_add_dr_scan(3, fields, -1);
+ jtag_add_dr_scan(3, fields, TAP_INVALID);
#ifdef _DEBUG_INSTRUCTION_EXECUTION_
if((retval = jtag_execute_queue()) != ERROR_OK)
fields[2].in_handler = NULL;
fields[2].in_handler_priv = NULL;
- jtag_add_dr_scan(3, fields, -1);
+ jtag_add_dr_scan(3, fields, TAP_INVALID);
#ifdef _DEBUG_INSTRUCTION_EXECUTION_
LOG_DEBUG("addr: 0x%x value: %8.8x", reg_addr, value);
fields[2].in_handler = NULL;
fields[2].in_handler_priv = NULL;
- jtag_add_dr_scan(3, fields, -1);
+ jtag_add_dr_scan(3, fields, TAP_INVALID);
- jtag_add_runtest(0, -1);
+ jtag_add_runtest(0, TAP_INVALID);
#ifdef _DEBUG_INSTRUCTION_EXECUTION_
{
fields[2].in_handler = NULL;
fields[2].in_handler_priv = NULL;
- jtag_add_dr_scan(3, fields, -1);
+ jtag_add_dr_scan(3, fields, TAP_INVALID);
- jtag_add_runtest(0, -1);
+ jtag_add_runtest(0, TAP_INVALID);
#ifdef _DEBUG_INSTRUCTION_EXECUTION_
{
fields[2].in_handler = NULL;
fields[2].in_handler_priv = NULL;
- jtag_add_dr_scan(3, fields, -1);
+ jtag_add_dr_scan(3, fields, TAP_INVALID);
- jtag_add_runtest(0, -1);
+ jtag_add_runtest(0, TAP_INVALID);
#ifdef _DEBUG_INSTRUCTION_EXECUTION_
{
field.in_check_mask = NULL;
field.in_handler = handler;
field.in_handler_priv = NULL;
- jtag_add_ir_scan(1, &field, -1);
+ jtag_add_ir_scan(1, &field, TAP_INVALID);
}
return ERROR_OK;
1,
num_bits,
values,
- -1);
+ TAP_INVALID);
jtag_info->cur_scan_chain = new_scan_chain;
}
fields[1].in_check_value = NULL;
fields[1].in_check_mask = NULL;
- jtag_add_dr_scan(2, fields, -1);
+ jtag_add_dr_scan(2, fields, TAP_INVALID);
return ERROR_OK;
}
fields[1].in_check_value = NULL;
fields[1].in_check_mask = NULL;
- jtag_add_dr_scan(2, fields, -1);
+ jtag_add_dr_scan(2, fields, TAP_INVALID);
return ERROR_OK;
}
fields[2].in_handler = NULL;
fields[2].in_handler_priv = NULL;
- jtag_add_dr_scan(3, fields, -1);
+ jtag_add_dr_scan(3, fields, TAP_INVALID);
fields[0].in_value = reg->value;
jtag_set_check_value(fields+0, check_value, check_mask, NULL);
*/
buf_set_u32(fields[1].out_value, 0, 5, embeddedice_reg_arch_info[EICE_COMMS_CTRL]);
- jtag_add_dr_scan(3, fields, -1);
+ jtag_add_dr_scan(3, fields, TAP_INVALID);
return ERROR_OK;
}
fields[2].in_handler = NULL;
fields[2].in_handler_priv = NULL;
- jtag_add_dr_scan(3, fields, -1);
+ jtag_add_dr_scan(3, fields, TAP_INVALID);
while (size > 0)
{
fields[0].in_handler = arm_jtag_buf_to_u32;
fields[0].in_handler_priv = data;
- jtag_add_dr_scan(3, fields, -1);
+ jtag_add_dr_scan(3, fields, TAP_INVALID);
data++;
size--;
while (size > 0)
{
buf_set_u32(fields[0].out_value, 0, 32, *data);
- jtag_add_dr_scan(3, fields, -1);
+ jtag_add_dr_scan(3, fields, TAP_INVALID);
data++;
size--;
fields[2].in_handler = NULL;
fields[2].in_handler_priv = NULL;
- jtag_add_dr_scan(3, fields, -1);
+ jtag_add_dr_scan(3, fields, TAP_INVALID);
gettimeofday(&lap, NULL);
do
{
- jtag_add_dr_scan(3, fields, -1);
+ jtag_add_dr_scan(3, fields, TAP_INVALID);
if ((retval = jtag_execute_queue()) != ERROR_OK)
return retval;
3,
embeddedice_num_bits,
values,
- -1);
+ TAP_INVALID);
}
void embeddedice_write_dcc(jtag_tap_t *tap, int reg_addr, u8 *buffer, int little, int count);
field.in_handler = NULL;
field.in_handler_priv = NULL;
- jtag_add_ir_scan(1, &field, -1);
+ jtag_add_ir_scan(1, &field, TAP_INVALID);
free(field.out_value);
}
/* select INTEST instruction */
etb_set_instr(etb, 0x2);
- jtag_add_dr_scan(1, &field, -1);
+ jtag_add_dr_scan(1, &field, TAP_INVALID);
etb->cur_scan_chain = new_scan_chain;
fields[2].in_handler = NULL;
fields[2].in_handler_priv = NULL;
- jtag_add_dr_scan(3, fields, -1);
+ jtag_add_dr_scan(3, fields, TAP_INVALID);
fields[0].in_handler = buf_to_u32_handler;
buf_set_u32(fields[1].out_value, 0, 7, 0);
fields[0].in_handler_priv = &data[i];
- jtag_add_dr_scan(3, fields, -1);
+ jtag_add_dr_scan(3, fields, TAP_INVALID);
}
jtag_execute_queue();
fields[2].in_handler = NULL;
fields[2].in_handler_priv = NULL;
- jtag_add_dr_scan(3, fields, -1);
+ jtag_add_dr_scan(3, fields, TAP_INVALID);
/* read the identification register in the second run, to make sure we
* don't read the ETB data register twice, skipping every second entry
jtag_set_check_value(fields+0, check_value, check_mask, NULL);
- jtag_add_dr_scan(3, fields, -1);
+ jtag_add_dr_scan(3, fields, TAP_INVALID);
free(fields[1].out_value);
free(fields[2].out_value);
fields[2].in_handler = NULL;
fields[2].in_handler_priv = NULL;
- jtag_add_dr_scan(3, fields, -1);
+ jtag_add_dr_scan(3, fields, TAP_INVALID);
free(fields[0].out_value);
free(fields[1].out_value);
fields[2].in_handler = NULL;
fields[2].in_handler_priv = NULL;
- jtag_add_dr_scan(3, fields, -1);
+ jtag_add_dr_scan(3, fields, TAP_INVALID);
fields[0].in_value = reg->value;
jtag_set_check_value(fields+0, check_value, check_mask, NULL);
- jtag_add_dr_scan(3, fields, -1);
+ jtag_add_dr_scan(3, fields, TAP_INVALID);
free(fields[1].out_value);
free(fields[2].out_value);
fields[2].in_handler = NULL;
fields[2].in_handler_priv = NULL;
- jtag_add_dr_scan(3, fields, -1);
+ jtag_add_dr_scan(3, fields, TAP_INVALID);
free(fields[0].out_value);
free(fields[1].out_value);
continue;
/* indirect branch to the exception vector means an exception occured */
- if (((ctx->last_branch >= 0x0) && (ctx->last_branch <= 0x20))
+ if ((ctx->last_branch <= 0x20)
|| ((ctx->last_branch >= 0xffff0000) && (ctx->last_branch <= 0xffff0020)))
{
if ((ctx->last_branch & 0xff) == 0x10)
fields[2].in_handler = NULL;
fields[2].in_handler_priv = NULL;
- jtag_add_dr_scan(3, fields, -1);
+ jtag_add_dr_scan(3, fields, TAP_INVALID);
- /* no jtag_add_runtest(0, -1) here */
+ /* no jtag_add_runtest(0, TAP_INVALID) here */
return ERROR_OK;
}
field.in_check_mask = NULL;
field.in_handler = handler;
field.in_handler_priv = NULL;
- jtag_add_ir_scan(1, &field, -1);
+ jtag_add_ir_scan(1, &field, TAP_INVALID);
}
return ERROR_OK;
field.in_check_mask = NULL;
field.in_handler = NULL;
field.in_handler_priv = NULL;
- jtag_add_dr_scan(1, &field, -1);
+ jtag_add_dr_scan(1, &field, TAP_INVALID);
if (jtag_execute_queue() != ERROR_OK)
{
field.in_check_mask = NULL;
field.in_handler = NULL;
field.in_handler_priv = NULL;
- jtag_add_dr_scan(1, &field, -1);
+ jtag_add_dr_scan(1, &field, TAP_INVALID);
if (jtag_execute_queue() != ERROR_OK)
{
field.in_check_mask = NULL;
field.in_handler = NULL;
field.in_handler_priv = NULL;
- jtag_add_dr_scan(1, &field, -1);
+ jtag_add_dr_scan(1, &field, TAP_INVALID);
if ((retval = jtag_execute_queue()) != ERROR_OK)
{
field.in_value = NULL;
jtag_set_check_value(&field, tap->expected, tap->expected_mask, NULL);
- jtag_add_ir_scan(1, &field, -1);
+ jtag_add_ir_scan(1, &field, TAP_INVALID);
free(field.out_value);
}
fields[2].in_value = NULL;
jtag_set_check_value(fields+2, &field2_check_value, &field2_check_mask, NULL);
- jtag_add_dr_scan(3, fields, -1);
+ jtag_add_dr_scan(3, fields, TAP_INVALID);
if ((retval = jtag_execute_queue()) != ERROR_OK)
{
jtag_add_end_state(TAP_IDLE);
- jtag_add_dr_scan(3, fields, -1);
+ jtag_add_dr_scan(3, fields, TAP_INVALID);
/* DANGER!!! this must be here. It will make sure that the arguments
* to jtag_set_check_value() does not go out of scope! */
jtag_add_end_state(TAP_IDLE);
xscale_jtag_set_instr(xscale->jtag_info.tap, xscale->jtag_info.dbgtx);
- jtag_add_runtest(1, -1); /* ensures that we're in the TAP_IDLE state as the above could be a no-op */
+ jtag_add_runtest(1, TAP_INVALID); /* ensures that we're in the TAP_IDLE state as the above could be a no-op */
/* repeat until all words have been collected */
int attempts=0;
fields[2].in_value = NULL;
jtag_set_check_value(fields+2, &field2_check_value, &field2_check_mask, NULL);
- jtag_add_dr_scan(3, fields, -1);
+ jtag_add_dr_scan(3, fields, TAP_INVALID);
if ((retval = jtag_execute_queue()) != ERROR_OK)
{
fields[1].in_handler = NULL;
fields[1].in_handler_priv = NULL;
- jtag_add_dr_scan(2, fields, -1);
+ jtag_add_dr_scan(2, fields, TAP_INVALID);
fields[0].num_bits = 32;
fields[0].out_value = packet;
{
buf_set_u32(packet, 0, 32, buffer[word]);
cmd = parity(*((u32*)packet));
- jtag_add_dr_scan(2, fields, -1);
+ jtag_add_dr_scan(2, fields, TAP_INVALID);
}
jtag_execute_queue();
fields[1].in_handler = NULL;
fields[1].in_handler_priv = NULL;
- jtag_add_dr_scan(2, fields, -1);
+ jtag_add_dr_scan(2, fields, TAP_INVALID);
return ERROR_OK;
}
projects / fw / openocd / commitdiff