uint16_t max_flash_size_kb;
bool has_dual_bank;
uint16_t max_bank_size_kb; /* Used when has_dual_bank is true */
- uint32_t flash_regs_base; /* Flash controller registers location */
uint32_t fsize_addr; /* Location of FSIZE register */
uint32_t wps_group_size; /* write protection group sectors' count */
uint32_t wps_mask;
.max_flash_size_kb = 2048,
.max_bank_size_kb = 1024,
.has_dual_bank = true,
- .flash_regs_base = FLASH_REG_BASE_B0,
.fsize_addr = 0x1FF1E880,
.wps_group_size = 1,
.wps_mask = 0xFF,
.max_flash_size_kb = 2048,
.max_bank_size_kb = 1024,
.has_dual_bank = true,
- .flash_regs_base = FLASH_REG_BASE_B0,
.fsize_addr = 0x08FFF80C,
.wps_group_size = 4,
.wps_mask = 0xFFFFFFFF,
LOG_INFO("Device: %s", stm32x_info->part_info->device_str);
}
- /* update the address of controller from data base */
- stm32x_info->flash_regs_base = stm32x_info->part_info->flash_regs_base;
+ /* update the address of controller */
+ if (bank->base == FLASH_BANK0_ADDRESS)
+ stm32x_info->flash_regs_base = FLASH_REG_BASE_B0;
+ else if (bank->base == FLASH_BANK1_ADDRESS)
+ stm32x_info->flash_regs_base = FLASH_REG_BASE_B1;
+ else {
+ LOG_WARNING("Flash register base not defined for bank %d", bank->bank_number);
+ return ERROR_FAIL;
+ }
+ LOG_DEBUG("flash_regs_base: 0x%" PRIx32, stm32x_info->flash_regs_base);
/* get flash size from target */
retval = target_read_u16(target, stm32x_info->part_info->fsize_addr, &flash_size_in_kb);