input pause_quanta_val,\r
// MAC_tx_ctrl\r
output pause_apply,\r
- input pause_quanta_sub);\r
+ input paused);\r
\r
// ****************************************************************************** \r
// Inhibit our TX from transmitting because they sent us a PAUSE frame\r
// ******************************************************************************\r
\r
- reg [15:0] pause_quanta_counter;\r
+ // Pauses are in units of 512 bit times, or 64 bytes/clock cycles, and can be\r
+ // as big as 16 bits, so 22 bits are needed for the counter\r
+ \r
+ reg [15+6:0] pause_quanta_counter;\r
reg pqval_d1, pqval_d2; \r
\r
always @(posedge tx_clk) pqval_d1 <= pause_quanta_val;\r
if (rst)\r
pause_quanta_counter <= 0;\r
else if (pqval_d1 & ~pqval_d2)\r
- pause_quanta_counter <= pause_quanta; \r
- else if((pause_quanta_counter!=0) & pause_quanta_sub)\r
+ pause_quanta_counter <= {pause_quanta, 6'b0}; \r
+ else if((pause_quanta_counter!=0) & paused)\r
pause_quanta_counter <= pause_quanta_counter - 1;\r
\r
assign pause_apply = tx_pause_en & (pause_quanta_counter != 0);\r
.tx_clk(tx_clk), .tx_data(tx_data), .tx_valid(tx_valid), .tx_error(tx_error), .tx_ack(tx_ack),
.ifg(SGE_IFG), .mac_addr(48'hF1_F2_F3_F4_F5_F6),
.pause_req(pause_req), .pause_time(pause_time), // We request flow control
- .pause_apply(pause_apply), .pause_applied(pause_applied) // We respect flow control
+ .pause_apply(pause_apply), .paused(paused) // We respect flow control
);
-/*
+
simple_gemac_rx simple_gemac_rx
(.reset(rst_rxclk),
.GMII_RX_CLK(GMII_RX_CLK), .GMII_RX_DV(GMII_RX_DV),
.GMII_RX_ER(GMII_RX_ER), .GMII_RXD(GMII_RXD),
.rx_clk(rx_clk), .rx_data(rx_data), .rx_valid(rx_valid), .rx_error(rx_error), .rx_ack(rx_ack),
- .pause_quanta_rcvd(pause_qanta_rcvd), .pause_rcvd(pause_rcvd)
+ .pause_quanta_rcvd(pause_quanta_rcvd), .pause_rcvd(pause_rcvd)
);
- */
+
flow_ctrl_tx flow_ctrl_tx
- (.rst(reset_txclk), .tx_clk(tx_clk),
+ (.rst(rst_txclk), .tx_clk(tx_clk),
.tx_pause_en(SGE_RESPECT_FLOW_CTRL),
.pause_quanta(pause_quanta_rcvd), // 16 bit value
.pause_quanta_val(pause_rcvd),
.pause_apply(pause_apply),
- .pause_quanta_sub(pause_applied)
+ .paused(paused)
);
--- /dev/null
+
+
+module simple_gemac_rx
+ (input clk125, input reset,
+ input GMII_RX_CLK, input GMII_RX_DV, input GMII_RX_ER, input [7:0] GMII_RXD,
+ output rx_clk, output [7:0] rx_data, output rx_valid, output rx_error, output rx_ack,
+ output reg [15:0] pause_quanta_rcvd, output reg pause_rcvd );
+
+
+
+ initial
+ begin
+ pause_rcvd <= 0;
+ pause_quanta_rcvd = 10;
+ #50000 pause_rcvd <= 1;
+ @(posedge rx_clk)
+ pause_rcvd <= 0;
+ repeat (100)
+ @(posedge rx_clk);
+ pause_quanta_rcvd <= 15;
+ pause_rcvd <= 1;
+ @(posedge rx_clk)
+ pause_rcvd <= 0;
+ repeat (1200)
+ @(posedge rx_clk);
+ pause_rcvd <= 1;
+ @(posedge rx_clk)
+ pause_rcvd <= 0;
+
+ end
+
+ assign rx_clk = GMII_RX_CLK;
+
+endmodule // simple_gemac_rx
initial #1000 reset = 0;
always #50 clk = ~clk;
- wire GMII_RX_DV, GMII_RX_ER, GMII_TX_EN, GMII_TX_ER;
+ wire GMII_RX_DV, GMII_RX_ER, GMII_TX_EN, GMII_TX_ER, GMII_GTX_CLK;
wire [7:0] GMII_RXD, GMII_TXD;
wire rx_valid, rx_error, rx_ack;
reg [7:0] tx_data;
wire [15:0] pause_time = 16'hBEEF;
- reg pause_req = 0;
+ reg pause_req = 0;
+
+ reg GMII_RX_CLK;
+ always @(GMII_GTX_CLK)
+ GMII_RX_CLK <= #30 GMII_GTX_CLK;
+
+// wire GMII_RX_CLK = #30 GMII_GTX_CLK;
simple_gemac simple_gemac
(.clk125(clk), .reset(reset),
output tx_clk, input [7:0] tx_data, input tx_valid, input tx_error, output tx_ack,
input [7:0] ifg, input [47:0] mac_addr,
input pause_req, input [15:0] pause_time,
- input pause_apply, output pause_applied
+ input pause_apply, output reg paused
);
reg tx_en_pre, tx_er_pre;
if(~in_ifg)
if(send_pause)
tx_state <= TX_PAUSE;
- else if(tx_valid)
+ else if(tx_valid & ~pause_apply)
tx_state <= TX_PREAMBLE;
TX_FIRSTBYTE :
if(tx_error)
GMII_TXD <= txd_pre;
endcase // case (tx_state)
end
+
+ // report that we are paused only when we get back to IDLE
+ always @(posedge tx_clk)
+ if(reset)
+ paused <= 0;
+ else if(~pause_apply)
+ paused <= 0;
+ else if(tx_state == TX_IDLE)
+ paused <= 1;
endmodule // simple_gemac_tx