arm mmu: error propagation added for address translation
authorØyvind Harboe <oyvind.harboe@zylin.com>
Thu, 10 Jun 2010 14:18:14 +0000 (16:18 +0200)
committerØyvind Harboe <oyvind.harboe@zylin.com>
Fri, 11 Jun 2010 13:53:23 +0000 (15:53 +0200)
The return value for MMU translation was a mess, either
error or value.

Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
src/target/arm720t.c
src/target/arm920t.c
src/target/arm926ejs.c
src/target/armv4_5_mmu.c
src/target/armv4_5_mmu.h
src/target/cortex_a8.c
src/target/xscale.c

index 009336082135dfdea6b72ea9e10e762ff654a9c9..867eb94237fdd91f0b6d0b1b9d516b8095daf669 100644 (file)
@@ -260,7 +260,10 @@ static int arm720_virt2phys(struct target *target,
        uint32_t ap;
        struct arm720t_common *arm720t = target_to_arm720(target);
 
-       uint32_t ret = armv4_5_mmu_translate_va(target, &arm720t->armv4_5_mmu, virtual, &type, &cb, &domain, &ap);
+       uint32_t ret;
+       int retval = armv4_5_mmu_translate_va(target, &arm720t->armv4_5_mmu, virtual, &type, &cb, &domain, &ap, &ret);
+       if (retval != ERROR_OK)
+               return retval;
        if (type == -1)
        {
                return ret;
index 658315b261cb742d9c405c15c1e6f73efbe45845..317519607e3c051d9b3e5ef98fd7081d7c70cb10 100644 (file)
@@ -514,8 +514,11 @@ static int arm920_virt2phys(struct target *target,
        uint32_t ap;
        struct arm920t_common *arm920t = target_to_arm920(target);
 
-       uint32_t ret = armv4_5_mmu_translate_va(target,
-                       &arm920t->armv4_5_mmu, virt, &type, &cb, &domain, &ap);
+       uint32_t ret;
+       int retval = armv4_5_mmu_translate_va(target,
+                       &arm920t->armv4_5_mmu, virt, &type, &cb, &domain, &ap, &ret);
+       if (retval != ERROR_OK)
+               return retval;
        if (type == -1)
        {
                return ret;
@@ -589,8 +592,10 @@ int arm920t_write_memory(struct target *target, uint32_t address,
                /*
                 * We need physical address and cb
                 */
-               pa = armv4_5_mmu_translate_va(target, &arm920t->armv4_5_mmu,
-                               address, &type, &cb, &domain, &ap);
+               int retval = armv4_5_mmu_translate_va(target, &arm920t->armv4_5_mmu,
+                               address, &type, &cb, &domain, &ap, &pa);
+               if (retval != ERROR_OK)
+                       return retval;
                if (type == -1)
                        return pa;
 
index 1f753a6e369568ff0206b29488bc40466494a6bf..a7aac550185e54d7aff323da61d715049ff99ad0 100644 (file)
@@ -726,7 +726,10 @@ static int arm926ejs_virt2phys(struct target *target, uint32_t virtual, uint32_t
        uint32_t ap;
        struct arm926ejs_common *arm926ejs = target_to_arm926(target);
 
-       uint32_t ret = armv4_5_mmu_translate_va(target, &arm926ejs->armv4_5_mmu, virtual, &type, &cb, &domain, &ap);
+       uint32_t ret;
+       int retval = armv4_5_mmu_translate_va(target, &arm926ejs->armv4_5_mmu, virtual, &type, &cb, &domain, &ap, &ret);
+       if (retval != ERROR_OK)
+               return retval;
        if (type == -1)
        {
                return ret;
index fc1dde7553bb0d74a1f906908d6b2d0ebaae4f7c..6990d13fc03c8e467105a7158f99d7b8443eafae 100644 (file)
 #include "armv4_5_mmu.h"
 
 
-uint32_t armv4_5_mmu_translate_va(struct target *target, struct armv4_5_mmu_common *armv4_5_mmu, uint32_t va, int *type, uint32_t *cb, int *domain, uint32_t *ap)
+int armv4_5_mmu_translate_va(struct target *target, struct armv4_5_mmu_common *armv4_5_mmu, uint32_t va, int *type, uint32_t *cb, int *domain, uint32_t *ap, uint32_t *val)
 {
        uint32_t first_lvl_descriptor = 0x0;
        uint32_t second_lvl_descriptor = 0x0;
        uint32_t ttb = armv4_5_mmu->get_ttb(target);
+       int retval;
 
-       armv4_5_mmu_read_physical(target, armv4_5_mmu,
+       retval = armv4_5_mmu_read_physical(target, armv4_5_mmu,
                (ttb & 0xffffc000) | ((va & 0xfff00000) >> 18),
                4, 1, (uint8_t*)&first_lvl_descriptor);
+       if (retval != ERROR_OK)
+         return retval;
        first_lvl_descriptor = target_buffer_get_u32(target, (uint8_t*)&first_lvl_descriptor);
 
        LOG_DEBUG("1st lvl desc: %8.8" PRIx32 "", first_lvl_descriptor);
@@ -62,22 +65,27 @@ uint32_t armv4_5_mmu_translate_va(struct target *target, struct armv4_5_mmu_comm
                *type = ARMV4_5_SECTION;
                *cb = (first_lvl_descriptor & 0xc) >> 2;
                *ap = (first_lvl_descriptor & 0xc00) >> 10;
-               return (first_lvl_descriptor & 0xfff00000) | (va & 0x000fffff);
+               *val = (first_lvl_descriptor & 0xfff00000) | (va & 0x000fffff);
+               return ERROR_OK;
        }
 
        if ((first_lvl_descriptor & 0x3) == 1)
        {
                /* coarse page table */
-               armv4_5_mmu_read_physical(target, armv4_5_mmu,
+               retval = armv4_5_mmu_read_physical(target, armv4_5_mmu,
                        (first_lvl_descriptor & 0xfffffc00) | ((va & 0x000ff000) >> 10),
                        4, 1, (uint8_t*)&second_lvl_descriptor);
+               if (retval != ERROR_OK)
+                       return retval;
        }
        else if ((first_lvl_descriptor & 0x3) == 3)
        {
                /* fine page table */
-               armv4_5_mmu_read_physical(target, armv4_5_mmu,
+               retval = armv4_5_mmu_read_physical(target, armv4_5_mmu,
                        (first_lvl_descriptor & 0xfffff000) | ((va & 0x000ffc00) >> 8),
                        4, 1, (uint8_t*)&second_lvl_descriptor);
+               if (retval != ERROR_OK)
+                       return retval;
        }
 
        second_lvl_descriptor = target_buffer_get_u32(target, (uint8_t*)&second_lvl_descriptor);
@@ -99,7 +107,8 @@ uint32_t armv4_5_mmu_translate_va(struct target *target, struct armv4_5_mmu_comm
                /* large page descriptor */
                *type = ARMV4_5_LARGE_PAGE;
                *ap = (second_lvl_descriptor & 0xff0) >> 4;
-               return (second_lvl_descriptor & 0xffff0000) | (va & 0x0000ffff);
+               *val = (second_lvl_descriptor & 0xffff0000) | (va & 0x0000ffff);
+               return ERROR_OK;
        }
 
        if ((second_lvl_descriptor & 0x3) == 2)
@@ -107,7 +116,8 @@ uint32_t armv4_5_mmu_translate_va(struct target *target, struct armv4_5_mmu_comm
                /* small page descriptor */
                *type = ARMV4_5_SMALL_PAGE;
                *ap = (second_lvl_descriptor & 0xff0) >> 4;
-               return (second_lvl_descriptor & 0xfffff000) | (va & 0x00000fff);
+               *val = (second_lvl_descriptor & 0xfffff000) | (va & 0x00000fff);
+               return ERROR_OK;
        }
 
        if ((second_lvl_descriptor & 0x3) == 3)
@@ -115,7 +125,8 @@ uint32_t armv4_5_mmu_translate_va(struct target *target, struct armv4_5_mmu_comm
                /* tiny page descriptor */
                *type = ARMV4_5_TINY_PAGE;
                *ap = (second_lvl_descriptor & 0x30) >> 4;
-               return (second_lvl_descriptor & 0xfffffc00) | (va & 0x000003ff);
+               *val = (second_lvl_descriptor & 0xfffffc00) | (va & 0x000003ff);
+               return ERROR_OK;
        }
 
        /* should not happen */
index 6b9ed34c0ac5d4fc1ad224b45edbb0357fa94309..3a6851fa0478fd63b5a7c0c5215b67f87f2d19d7 100644 (file)
@@ -43,9 +43,9 @@ enum
 
 extern char* armv4_5_page_type_names[];
 
-uint32_t armv4_5_mmu_translate_va(struct target *target,
+int armv4_5_mmu_translate_va(struct target *target,
                struct armv4_5_mmu_common *armv4_5_mmu, uint32_t va, int *type,
-               uint32_t *cb, int *domain, uint32_t *ap);
+               uint32_t *cb, int *domain, uint32_t *ap, uint32_t *val);
 
 int armv4_5_mmu_read_physical(struct target *target,
                struct armv4_5_mmu_common *armv4_5_mmu,
index aa0e030cc82a8441c893d2e353101ef311ec58c5..2edb9e3ee1f921fa6742615afe208b20480822e2 100644 (file)
@@ -1817,8 +1817,11 @@ static int cortex_a8_virt2phys(struct target *target,
         cortex_a8->current_address_mode = ARM_MODE_USR;
     else /* Linux kernel */
         cortex_a8->current_address_mode = ARM_MODE_SVC;
-       uint32_t ret = armv4_5_mmu_translate_va(target,
-                       &armv7a->armv4_5_mmu, virt, &type, &cb, &domain, &ap);
+       uint32_t ret;
+       int retval = armv4_5_mmu_translate_va(target,
+                       &armv7a->armv4_5_mmu, virt, &type, &cb, &domain, &ap, &ret);
+       if (retval != ERROR_OK)
+               return retval;
     /* Reset the flag. We don't want someone else to use it by error */
     cortex_a8->current_address_mode = ARM_MODE_ANY;
 
index ed0eef35237ec62de9bc7c5c20eb494ffdf57998..ab7eee3dfe212b86fceaea67f4c1e9bb6deeefed 100644 (file)
@@ -3226,7 +3226,10 @@ static int xscale_virt2phys(struct target *target,
                return ERROR_TARGET_INVALID;
        }
 
-       uint32_t ret = armv4_5_mmu_translate_va(target, &xscale->armv4_5_mmu, virtual, &type, &cb, &domain, &ap);
+       uint32_t ret;
+       int retval = armv4_5_mmu_translate_va(target, &xscale->armv4_5_mmu, virtual, &type, &cb, &domain, &ap, &ret);
+       if (retval != ERROR_OK)
+               return retval;
        if (type == -1)
        {
                return ret;