+MCS51 variants
+\begin_inset LatexCommand \index{MCS51 variants}
+
+\end_inset
+
+
+\layout Standard
+
+MCS51 processors are available from many vendors and come in many different
+ flavours.
+ While they might differ considerably in respect to Special Function Registers
+ the core MCS51 is usually not modified or is kept compatible.
+
+\layout Subsubsection*
+
+pdata access by SFR
+\layout Standard
+
+With the upcome of devices with internal xdata and flash memory devices
+ using port P2 as dedicated I/O port is becoming more popular.
+ Switching the high byte for pdata
+\begin_inset LatexCommand \index{pdata}
+
+\end_inset
+
+ access which was formerly done by port P2 is then achieved by a Special
+ Function Register.
+ In well-established MCS51 tradition the address of this
+\emph on
+sfr
+\emph default
+ is where the chip designers decided to put it.
+ As pdata addressing is used in the startup code for the initialization
+ of xdata variables a separate startup code should be used as described
+ in section
+\begin_inset LatexCommand \ref{sub:Startup-Code}
+
+\end_inset
+
+.
+\layout Subsubsection*
+
+Other Features available by SFR
+\layout Standard
+
+Some MCS51 variants offer features like Double DPTR
+\begin_inset LatexCommand \index{DPTR}
+
+\end_inset
+
+, multiple DPTR, decrementing DPTR, 16x16 Multiply.
+ These are currently not used for the MCS51 port.
+ If you absolutely need them you can fall back to inline assembly or submit
+ a patch to SDCC.
+\layout Subsubsection
+