These devices differ from LPC8xx devices in that they have a different
IAP entry point, but everything else is the same. Using Tcl to pass
different IAP entry point.
no new Clang analyser warnings and no new build sanitizers issues.
Change-Id: I2d654dd250f416e74262c0228cad8713a283402f
Signed-off-by: Rod Boyce <developer@teamboyce.co.uk>
Reviewed-on: http://openocd.zylin.com/4684
Reviewed-by: Jean-Christian de Rivaz <jcamdr70@gmail.com>
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
The LPC29xx family is supported by the @var{lpc2900} driver.
@end quotation
The LPC29xx family is supported by the @var{lpc2900} driver.
@end quotation
-The @var{lpc2000} driver defines two mandatory and one optional parameters,
+The @var{lpc2000} driver defines two mandatory and two optional parameters,
which must appear in the following order:
@itemize
which must appear in the following order:
@itemize
However, if you do provide it,
with most tool chains @command{verify_image} will fail.
@end quotation
However, if you do provide it,
with most tool chains @command{verify_image} will fail.
@end quotation
+@item @option{iap_entry} ... optional telling the driver to use a different
+ROM IAP entry point.
@end itemize
LPC flashes don't require the chip and bus width to be specified.
@end itemize
LPC flashes don't require the chip and bus width to be specified.
* - 822 | 4 (tested with LPC824)
* - 8N04
* - NHS31xx (tested with NHS3100)
* - 822 | 4 (tested with LPC824)
* - 8N04
* - NHS31xx (tested with NHS3100)
+ * - 844 | 5 (tested with LPC845)
#define NHS3152 0x4e315220
#define NHS3153 0x4e315320 /* Only specified in Rev.1 of the datasheet */
#define NHS3152 0x4e315220
#define NHS3153 0x4e315320 /* Only specified in Rev.1 of the datasheet */
+#define LPC844_201 0x00008441
+#define LPC844_201_1 0x00008442
+#define LPC844_201_2 0x00008444
+
+#define LPC845_301 0x00008451
+#define LPC845_301_1 0x00008452
+#define LPC845_301_2 0x00008453
+#define LPC845_301_3 0x00008454
+
#define IAP_CODE_LEN 0x34
#define LPC11xx_REG_SECTORS 24
#define IAP_CODE_LEN 0x34
#define LPC11xx_REG_SECTORS 24
int checksum_vector;
uint32_t iap_max_stack;
uint32_t lpc4300_bank;
int checksum_vector;
uint32_t iap_max_stack;
uint32_t lpc4300_bank;
+ uint32_t iap_entry_alternative;
lpc2000_info->cmd51_max_buffer = 1024; /* For LPC824, has 8kB of SRAM */
bank->num_sectors = 32;
break;
lpc2000_info->cmd51_max_buffer = 1024; /* For LPC824, has 8kB of SRAM */
bank->num_sectors = 32;
break;
+ case 64 * 1024:
+ lpc2000_info->cmd51_max_buffer = 1024; /* For LPC844, has 8kB of SRAM */
+ bank->num_sectors = 64;
+ break;
default:
LOG_ERROR("BUG: unknown bank->size encountered");
exit(-1);
default:
LOG_ERROR("BUG: unknown bank->size encountered");
exit(-1);
+ if (lpc2000_info->iap_entry_alternative != 0x0)
+ iap_entry_point = lpc2000_info->iap_entry_alternative;
+
struct mem_param mem_params[2];
/* command parameter table */
struct mem_param mem_params[2];
/* command parameter table */
if (strcmp(CMD_ARGV[8], "calc_checksum") == 0)
lpc2000_info->calc_checksum = 1;
}
if (strcmp(CMD_ARGV[8], "calc_checksum") == 0)
lpc2000_info->calc_checksum = 1;
}
+ if (CMD_ARGC >= 10 && !lpc2000_info->iap_entry_alternative)
+ COMMAND_PARSE_NUMBER(u32, CMD_ARGV[9], lpc2000_info->iap_entry_alternative);
bank->size = 30 * 1024;
break;
bank->size = 30 * 1024;
break;
+ case LPC844_201:
+ case LPC844_201_1:
+ case LPC844_201_2:
+ case LPC845_301:
+ case LPC845_301_1:
+ case LPC845_301_2:
+ case LPC845_301_3:
+ lpc2000_info->variant = lpc800;
+ bank->size = 64 * 1024;
+ break;
+
default:
LOG_ERROR("BUG: unknown Part ID encountered: 0x%" PRIx32, part_id);
exit(-1);
default:
LOG_ERROR("BUG: unknown Part ID encountered: 0x%" PRIx32, part_id);
exit(-1);
# (same cmd51 destination boundary alignment, and all three support 256 byte
# transfers).
#
# (same cmd51 destination boundary alignment, and all three support 256 byte
# transfers).
#
-# flash bank <name> lpc2000 <base> <size> 0 0 <target#> <variant> <clock> [calc checksum]
+# flash bank <name> lpc2000 <base> <size> 0 0 <target#> <variant> <clock> [calc checksum] [iap entry]
+set _IAP_ENTRY 0
+if { [info exists IAP_ENTRY] } {
+ set _IAP_ENTRY $IAP_ENTRY
+}
set _FLASHNAME $_CHIPNAME.flash
flash bank $_FLASHNAME lpc2000 0x0 0 0 0 $_TARGETNAME \
set _FLASHNAME $_CHIPNAME.flash
flash bank $_FLASHNAME lpc2000 0x0 0 0 0 $_TARGETNAME \
- auto $_CCLK calc_checksum
+ auto $_CCLK calc_checksum $_IAP_ENTRY
if { $_CHIPSERIES == "lpc800" || $_CHIPSERIES == "lpc1100" || $_CHIPSERIES == "lpc1200" || $_CHIPSERIES == "lpc1300" } {
# Do not remap 0x0000-0x0200 to anything but the flash (i.e. select
if { $_CHIPSERIES == "lpc800" || $_CHIPSERIES == "lpc1100" || $_CHIPSERIES == "lpc1200" || $_CHIPSERIES == "lpc1300" } {
# Do not remap 0x0000-0x0200 to anything but the flash (i.e. select
--- /dev/null
+# NXP LPC84x Cortex-M0+ with at least 8kB SRAM
+if { ![info exists CHIPNAME] } {
+ set CHIPNAME lpc84x
+}
+set CHIPSERIES lpc800
+if { ![info exists WORKAREASIZE] } {
+ set WORKAREASIZE 0x1fe0
+}
+
+set IAP_ENTRY 0x0F001FF1
+source [find target/lpc1xxx.cfg]