INCFSZ/INCFSZW and declared them as changing Z bit,
(insertPCodeInstruction): correctly invert the above instructions,
fixes #
1599333,
(DoBankSelect): don't panic on po_immediates
git-svn-id: https://sdcc.svn.sourceforge.net/svnroot/sdcc/trunk/sdcc@4473
4a8a32a2-be11-0410-ad9d-
d568d2c75423
+2006-11-20 Raphael Neider <rneider AT web.de>
+
+ * src/pic/pcode.c: changed inverted ops for DECFSZ/DECFSZW and
+ INCFSZ/INCFSZW and declared them as changing Z bit,
+ (insertPCodeInstruction): correctly invert the above instructions,
+ fixes #1599333,
+ (DoBankSelect): don't panic on po_immediates
+
2006-11-14 Maarten Brock <sourceforge.brock AT dse.nl>
* as/link/aslink.h,
2006-11-14 Maarten Brock <sourceforge.brock AT dse.nl>
* as/link/aslink.h,
1,0, // dest, bit instruction
1,1, // branch, skip
0, // literal operand
1,0, // dest, bit instruction
1,1, // branch, skip
0, // literal operand
- POC_NOP,
- PCC_REGISTER, // inCond
- PCC_REGISTER // outCond
+ POC_DECF, // followed by BTFSC STATUS, Z --> also kills STATUS
+ PCC_REGISTER, // inCond
+ PCC_REGISTER | PCC_Z // outCond
};
pCodeInstruction pciDECFSZW = {
};
pCodeInstruction pciDECFSZW = {
0,0, // dest, bit instruction
1,1, // branch, skip
0, // literal operand
0,0, // dest, bit instruction
1,1, // branch, skip
0, // literal operand
+ POC_DECFW, // followed by BTFSC STATUS, Z --> also kills STATUS
+ PCC_W | PCC_Z // outCond
};
pCodeInstruction pciGOTO = {
};
pCodeInstruction pciGOTO = {
1,0, // dest, bit instruction
1,1, // branch, skip
0, // literal operand
1,0, // dest, bit instruction
1,1, // branch, skip
0, // literal operand
- POC_NOP,
- PCC_REGISTER, // inCond
- PCC_REGISTER // outCond
+ POC_INCF, // followed by BTFSC STATUS, Z --> also kills STATUS
+ PCC_REGISTER, // inCond
+ PCC_REGISTER | PCC_Z // outCond
};
pCodeInstruction pciINCFSZW = {
};
pCodeInstruction pciINCFSZW = {
0,0, // dest, bit instruction
1,1, // branch, skip
0, // literal operand
0,0, // dest, bit instruction
1,1, // branch, skip
0, // literal operand
+ POC_INCFW, // followed by BTFSC STATUS, Z --> also kills STATUS
+ PCC_W | PCC_Z // outCond
};
pCodeInstruction pciIORWF = {
};
pCodeInstruction pciIORWF = {
pCodeInsertAfter (pcprev, jump);
pCodeInsertAfter (pcprev, jump);
+ // Yuck: Cannot simply replace INCFSZ/INCFSZW/DECFSZ/DECFSZW
+ // We replace them with INCF/INCFW/DECF/DECFW followed by 'BTFSS STATUS, Z'
+ switch (PCI(pcprev)->op) {
+ case POC_INCFSZ:
+ case POC_INCFSZW:
+ case POC_DECFSZ:
+ case POC_DECFSZW:
+ // These are turned into non-skipping instructions, so
+ // insert 'BTFSC STATUS, Z' after pcprev
+ pCodeInsertAfter (pcprev, newpCode(POC_BTFSC, popCopyGPR2Bit(PCOP(&pc_status), PIC_Z_BIT)));
+ break;
+ default:
+ // no special actions required
+ break;
+ }
pCodeReplace (pcprev, pCodeInstructionCopy (PCI(pcprev), 1));
pcprev = NULL;
pCodeInsertAfter((pCode*)pci, label);
pCodeReplace (pcprev, pCodeInstructionCopy (PCI(pcprev), 1));
pcprev = NULL;
pCodeInsertAfter((pCode*)pci, label);
#if 1
/* Always insert BANKSELs rather than try to be clever:
* Too many bugs in optimized banksels... */
#if 1
/* Always insert BANKSELs rather than try to be clever:
* Too many bugs in optimized banksels... */
+
+ // possible optimizations:
+ // * do not emit BANKSELs for SFRs that are present in all banks (bankmsk == regmap for this register)
insertBankSel(pci, reg->name); // Let linker choose the bank selection
return 'L';
#else
insertBankSel(pci, reg->name); // Let linker choose the bank selection
return 'L';
#else
if (!reg && isPCI(pc) &&
((PCI(pc)->inCond | PCI(pc)->outCond) & PCC_REGISTER))
{
if (!reg && isPCI(pc) &&
((PCI(pc)->inCond | PCI(pc)->outCond) & PCC_REGISTER))
{
- assert(!"Could not get register from instruction.");
+ if (PCI(pc)->pcop && PCI(pc)->pcop->type == PO_IMMEDIATE) {
+ // fine, this should be low(variable) --> no BANKING required
+ } else {
+ assert(!"Could not get register from instruction.");
+ }
}
if (reg) {
if (IsBankChange(pc,reg,&cur_bank))
}
if (reg) {
if (IsBankChange(pc,reg,&cur_bank))