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more clearance between v_ldo_in and the screw in the corner of the board...
author
Bdale Garbee
<bdale@gag.com>
Fri, 11 Oct 2013 14:48:05 +0000
(07:48 -0700)
committer
Bdale Garbee
<bdale@gag.com>
Fri, 11 Oct 2013 14:48:05 +0000
(07:48 -0700)
telemega.pcb
patch
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blob
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diff --git
a/telemega.pcb
b/telemega.pcb
index 0873804d34d8ac6cf6c3b6415e6b5732e1f837dc..61e920aa594fe39712cad56a7fa401f056ca06d1 100644
(file)
--- a/
telemega.pcb
+++ b/
telemega.pcb
@@
-6,11
+6,11
@@
FileVersion[20070407]
PCB["TeleMega" 325000 125000]
Grid[100.0 0 0 0]
PCB["TeleMega" 325000 125000]
Grid[100.0 0 0 0]
-Cursor[
3400 722
00 0.000000]
+Cursor[
2200 271
00 0.000000]
PolyArea[200000000.000000]
Thermal[0.500000]
DRC[600 1000 600 500 1500 700]
PolyArea[200000000.000000]
Thermal[0.500000]
DRC[600 1000 600 500 1500 700]
-Flags("showdrc,nameonpcb,clearnew,
snappin,
liveroute,hidenames")
+Flags("showdrc,nameonpcb,clearnew,liveroute,hidenames")
Groups("1,c:4,s:2:3:5")
Styles["Signal,10,31,15,8:Power,25,60,35,10:Fat,40,60,35,10:Medium,15,24,12,600"]
Groups("1,c:4,s:2:3:5")
Styles["Signal,10,31,15,8:Power,25,60,35,10:Fat,40,60,35,10:Medium,15,24,12,600"]
@@
-2244,7
+2244,7
@@
Element["" "8ufson2x2" "U14" "LM293" 50500 62500 0 0 2 100 ""]
)
)
-Element["" "powerdi123" "D3" "DFLS130L"
27400 902
60 0 0 3 100 ""]
+Element["" "powerdi123" "D3" "DFLS130L"
30000 905
60 0 0 3 100 ""]
(
Pad[0 2165 0 5315 5512 2362 6693 "cathode" "2" "square,edge2"]
Pad[-984 -6299 984 -6299 3543 2362 4724 "anode" "1" "square"]
(
Pad[0 2165 0 5315 5512 2362 6693 "cathode" "2" "square,edge2"]
Pad[-984 -6299 984 -6299 3543 2362 4724 "anode" "1" "square"]
@@
-3398,10
+3398,9
@@
Layer(1 "top")
Line[44200 75400 44200 78500 4000 2000 "clearline"]
Line[44200 78500 38400 84300 4000 2000 "clearline"]
Line[33574 77000 33574 77226 4000 2000 "clearline"]
Line[44200 75400 44200 78500 4000 2000 "clearline"]
Line[44200 78500 38400 84300 4000 2000 "clearline"]
Line[33574 77000 33574 77226 4000 2000 "clearline"]
- Line[33574 77226
27500 834
00 4000 2000 "clearline"]
+ Line[33574 77226
30000 839
00 4000 2000 "clearline"]
Line[38400 101100 38400 96110 2500 2000 "clearline"]
Line[38400 96110 29510 96110 4000 2000 "clearline"]
Line[38400 101100 38400 96110 2500 2000 "clearline"]
Line[38400 96110 29510 96110 4000 2000 "clearline"]
- Line[29510 96110 27400 94000 4000 2000 "clearline"]
Line[35552 19300 35552 23174 1000 2000 ""]
Line[35552 23174 35526 23200 1000 2000 ""]
Line[38700 19300 42100 19300 1000 2000 ""]
Line[35552 19300 35552 23174 1000 2000 ""]
Line[35552 23174 35526 23200 1000 2000 ""]
Line[38700 19300 42100 19300 1000 2000 ""]