* device/lib/mcs51/crtpagesfr.asm,
* device/lib/mcs51/crtxinit.asm,
* device/lib/mcs51/crtxstack.asm: Changed name of _PAGESFR to _XPAGE
to avoid confusion with Si Lab's SFRPAGE register.
git-svn-id: https://sdcc.svn.sourceforge.net/svnroot/sdcc/trunk/sdcc@3268
4a8a32a2-be11-0410-ad9d-
d568d2c75423
+2004-03-18 Erik Petrich <epetrich AT ivorytower.norman.ok.us>
+
+ * doc/sdccman.lyx,
+ * device/lib/mcs51/crtpagesfr.asm,
+ * device/lib/mcs51/crtxinit.asm,
+ * device/lib/mcs51/crtxstack.asm: Changed name of _PAGESFR to _XPAGE
+ to avoid confusion with Si Lab's SFRPAGE register.
+
+
2004-03-17 Erik Petrich <epetrich AT ivorytower.norman.ok.us>
* src/SDCCglue.c (emitMaps): allow public sfr variables
2004-03-17 Erik Petrich <epetrich AT ivorytower.norman.ok.us>
* src/SDCCglue.c (emitMaps): allow public sfr variables
; what you give them. Help stamp out software-hoarding!
; -------------------------------------------------------------------------*/
; what you give them. Help stamp out software-hoarding!
; -------------------------------------------------------------------------*/
-__PAGESFR == 0xa0 ; 0xa0 is P2 on the original 8051
+__XPAGE == 0xa0 ; 0xa0 is P2 on the original 8051
.area GSINIT5 (CODE)
.area GSINIT (CODE)
.area GSFINAL (CODE)
.area GSINIT5 (CODE)
.area GSINIT (CODE)
.area GSFINAL (CODE)
mov r2,#((l_XINIT+255) >> 8)
mov dptr,#s_XINIT
mov r0,#s_XISEG
mov r2,#((l_XINIT+255) >> 8)
mov dptr,#s_XINIT
mov r0,#s_XISEG
- mov __PAGESFR,#(s_XISEG >> 8)
+ mov __XPAGE,#(s_XISEG >> 8)
00001$: clr a
movc a,@a+dptr
movx @r0,a
inc dptr
inc r0
cjne r0,#0,00002$
00001$: clr a
movc a,@a+dptr
movx @r0,a
inc dptr
inc r0
cjne r0,#0,00002$
00002$: djnz r1,00001$
djnz r2,00001$
00002$: djnz r1,00001$
djnz r2,00001$
00003$:
\ No newline at end of file
00003$:
\ No newline at end of file
.area GSFINAL (CODE)
.globl __start__xstack
.area GSFINAL (CODE)
.globl __start__xstack
; Need to initialize in GSINIT1 in case the user's __sdcc_external_startup
; uses the xstack.
; Need to initialize in GSINIT1 in case the user's __sdcc_external_startup
; uses the xstack.
- mov __PAGESFR,#(__start__xstack >> 8)
+ mov __XPAGE,#(__start__xstack >> 8)
mov _spx,#__start__xstack
.area GSINIT5 (CODE)
mov _spx,#__start__xstack
.area GSINIT5 (CODE)
; Need to initialize in GSINIT5 because __mcs51_genXINIT modifies __PAGESFR
; and __mcs51_genRAMCLEAR modifies _spx.
; Need to initialize in GSINIT5 because __mcs51_genXINIT modifies __PAGESFR
; and __mcs51_genRAMCLEAR modifies _spx.
- mov __PAGESFR,#(__start__xstack >> 8)
+ mov __XPAGE,#(__start__xstack >> 8)
mov _spx,#__start__xstack
mov _spx,#__start__xstack
is where the chip designers decided to put it.
Needless to say that they didn't agree on a common name either.
So that the startup code can correctly initialize xdata variables, you
is where the chip designers decided to put it.
Needless to say that they didn't agree on a common name either.
So that the startup code can correctly initialize xdata variables, you
- should define an sfr with the name _PAGESFR at the appropriate location
- if the default, port P2, is not used for this.
+ should define an sfr with the name _XPAGE at the appropriate location if
+ the default, port P2, is not used for this.
Some examples are:
\layout Verse
\family typewriter
Some examples are:
\layout Verse
\family typewriter
-sfr at 0x92 _PAGESFR; /* Cypress EZ-USB family */
+sfr at 0x92 _XPAGE; /* Cypress EZ-USB family */
\layout Verse
\family typewriter
\layout Verse
\family typewriter
-sfr at 0xaf _PAGESFR; /* some Silicon Labs (Cygnal) chips */
+sfr at 0xaf _XPAGE; /* some Silicon Labs (Cygnal) chips */
\layout Verse
\family typewriter
\layout Verse
\family typewriter
-sfr at 0xaa _PAGESFR; /* some Silicon Labs (Cygnal) chips */
+sfr at 0xaa _XPAGE; /* some Silicon Labs (Cygnal) chips */
\layout Standard
For more exotic implementations further customizations may be needed.
\layout Standard
For more exotic implementations further customizations may be needed.