The field 'wp_pc' was originally introduced in commit
55eeea7fceb6
("ARMv7a/Cortex-A8: report watchpoint trigger insn") in end 2009
to contain the address of the instruction which triggered a
watchpoint. Later on with commit
651b861d5d5f ("target/aarch64:
Add watchpoint support") it has been reused in to hold directly
the memory address that triggered a watchpoint.
Rename 'wp_pc' as 'wp_addr' and change its doxygen description.
While there, fix the format string to print the field.
Change-Id: I2e5ced1497e4a6fb6b38f91e881807512e8d8c47
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/6204
Tested-by: jenkins
Reviewed-by: Liming Sun <limings@nvidia.com>
uint64_t exception_address;
struct watchpoint *wp;
uint64_t exception_address;
struct watchpoint *wp;
- exception_address = armv8->dpm.wp_pc;
+ exception_address = armv8->dpm.wp_addr;
if (exception_address == 0xFFFFFFFF)
return ERROR_FAIL;
if (exception_address == 0xFFFFFFFF)
return ERROR_FAIL;
/* the EDWAR value needs to have 8 added to it so we add */
/* that check as well not sure if that is a core bug) */
/**********************************************************/
/* the EDWAR value needs to have 8 added to it so we add */
/* that check as well not sure if that is a core bug) */
/**********************************************************/
- for (exception_address = armv8->dpm.wp_pc; exception_address <= (armv8->dpm.wp_pc + 8);
+ for (exception_address = armv8->dpm.wp_addr; exception_address <= (armv8->dpm.wp_addr + 8);
exception_address += 8) {
for (wp = target->watchpoints; wp; wp = wp->next) {
if ((exception_address >= wp->address) && (exception_address < (wp->address + wp->length))) {
*hit_watchpoint = wp;
exception_address += 8) {
for (wp = target->watchpoints; wp; wp = wp->next) {
if ((exception_address >= wp->address) && (exception_address < (wp->address + wp->length))) {
*hit_watchpoint = wp;
- if (exception_address != armv8->dpm.wp_pc)
+ if (exception_address != armv8->dpm.wp_addr)
LOG_DEBUG("watchpoint hit required EDWAR to be increased by 8");
return ERROR_OK;
}
LOG_DEBUG("watchpoint hit required EDWAR to be increased by 8");
return ERROR_OK;
}
/* REVISIT also display ARM11-specific MMU and cache status ... */
if (target->debug_reason == DBG_REASON_WATCHPOINT)
/* REVISIT also display ARM11-specific MMU and cache status ... */
if (target->debug_reason == DBG_REASON_WATCHPOINT)
- LOG_USER("Watchpoint triggered at PC %#08x",
- (unsigned) arm11->dpm.wp_pc);
+ LOG_USER("Watchpoint triggered at PC " TARGET_ADDR_FMT, arm11->dpm.wp_addr);
}
/*----------------------------------------------------------------------*/
}
/*----------------------------------------------------------------------*/
struct dpm_bp *dbp;
struct dpm_wp *dwp;
struct dpm_bp *dbp;
struct dpm_wp *dwp;
- /** Address of the instruction which triggered a watchpoint. */
- target_addr_t wp_pc;
+ /**
+ * Target dependent watchpoint address.
+ * Either the address of the instruction which triggered a watchpoint
+ * or the memory address whose access triggered a watchpoint.
+ */
+ target_addr_t wp_addr;
/** Recent value of DSCR. */
uint32_t dscr;
/** Recent value of DSCR. */
uint32_t dscr;
if (arm->core_mode == ARM_MODE_ABT)
armv7a_show_fault_registers(target);
if (target->debug_reason == DBG_REASON_WATCHPOINT)
if (arm->core_mode == ARM_MODE_ABT)
armv7a_show_fault_registers(target);
if (target->debug_reason == DBG_REASON_WATCHPOINT)
- LOG_USER("Watchpoint triggered at PC %#08x",
- (unsigned) armv7a->dpm.wp_pc);
+ LOG_USER("Watchpoint triggered at PC " TARGET_ADDR_FMT, armv7a->dpm.wp_addr);
armv8_show_fault_registers(target);
if (target->debug_reason == DBG_REASON_WATCHPOINT)
armv8_show_fault_registers(target);
if (target->debug_reason == DBG_REASON_WATCHPOINT)
- LOG_USER("Watchpoint triggered at PC %#08x",
- (unsigned) armv8->dpm.wp_pc);
+ LOG_USER("Watchpoint triggered at PC " TARGET_ADDR_FMT, armv8->dpm.wp_addr);
LOG_DEBUG("Unknown core_state");
break;
}
LOG_DEBUG("Unknown core_state");
break;
}