+# $linkFile = "$path/lkr/" . lc $processor . ".lkr";
+# open(LINK, "<$linkFile")
+# || die "$programName: Error: Cannot open linker file $linkFile ($!)\n";
+# while (<LINK>) {
+# if (/^(\S+)\s+NAME=(\S+)\s+START=(\S+)\s+END=(\S+)\s+(PROTECTED)?/) {
+# $type = $1;
+# $name = $2;
+# $start = $3;
+# $end = $4;
+# $protected = 1 if ($5 =~ /protected/i);
+
+# if ($type =~ /(SHAREBANK)|(DATABANK)/i) {
+# $ram{"p$processor"} .=
+# sprintf("#pragma memmap %7s %7s RAM 0x000\t// $name\n",
+# $start, $end);
+# }
+# } elsif (/^SECTION\s+NAME=(\S+)\s+ROM=(\S+)\s+/) {
+# }
+# }
+
+#
+# Convert the file.
+#
+$defaultType = 'other';
+$includeFile = "$path/header/p" . lc $processor . ".inc";
+open(HEADER, "<$includeFile")
+ || die "$programName: Error: Cannot open include file $includeFile ($!)\n";
+
+while (<HEADER>) {
+ if (/^;-* (\S+) Bits/i) {
+ if (defined($alias{$1})) {
+ $defaultType = "bits $alias{$1}";
+ } else {
+ $defaultType = "bits $1";
+ }
+ s/;/\/\//;
+ $body .= "$_";
+ } elsif (/^;-* Register Files/i) {
+ $defaultType = 'sfr';
+ s/;/\/\//;
+ $body .= "$_";
+ } elsif (/^;=*/i) {
+ $defaultType = '';
+ s/;/\/\//;
+ $body .= "$_";
+ } elsif (/^\s*;/) {
+ #
+ # Convert ASM comments to C style.
+ #
+ $body .= "//$'";
+ } elsif (/^\s*IFNDEF __(\S+)/) {
+ #
+ # Processor type.
+ #
+ $processor = $1;
+ $body .= "//$_";
+ } elsif (/^\s*(\S+)\s+EQU\s+H'(.+)'/) {
+ #
+ # Useful bit of information.
+ #
+ $name = $1;
+ $value = $2;
+ $rest = $';
+ $rest =~ s/;/\/\//;
+ chomp($rest);
+
+ if (defined($type{"p$processor", "$name"})) {
+ $type = $type{"p$processor", "$name"};
+ } elsif (defined($type{"$name"})) {
+ $type = $type{"$name"};
+ } else {
+ $type = $defaultType;
+ }
+
+ if (defined($bitmask{"p$processor", "$name"})) {
+ $bitmask = $bitmask{"p$processor", "$name"};
+# } elsif (defined($bitmask{"$name"})) {
+# $bitmask = $bitmask{"$name"};
+ } else {
+ $bitmask = "0x000";
+ }
+
+ if ($type eq 'sfr') {
+ #
+ # A special function register.
+ #
+ $pragmas .= sprintf("#pragma memmap %s_ADDR %s_ADDR "
+ . "SFR %s\t// %s\n",
+ $name, $name, $bitmask, $name);
+ if (defined $addr{"p$processor", "$name"}) {
+ $addresses .= sprintf("#define %s_ADDR\t0x%s\n", $name, $addr{"p$processor", "$name"});
+ } else {
+ $addresses .= sprintf("#define %s_ADDR\t0x%s\n", $name, $value);
+ }
+ $body .= sprintf("sfr at %-30s %s;$rest\n", "${name}_ADDR", $name);
+ $addr{"p$processor", "$name"} = "0x$value";
+ } elsif ($type eq 'volatile') {
+ #
+ # A location that can change without
+ # direct program manipulation.
+ #
+ $pragmas .= sprintf("#pragma memmap %s_ADDR %s_ADDR "
+ . "SFR %s\t// %s\n",
+ $name, $name, $bitmask, $name);
+ $body .= sprintf("data at %-30s %s;$rest\n", "${name}_ADDR volatile char", $name);
+ if (defined $addr{"p$processor", "$name"}) {
+ $addresses .= sprintf("#define %s_ADDR\t0x%s\n", $name, $addr{"p$processor", "$name"});
+ } else {
+ $addresses .= sprintf("#define %s_ADDR\t0x%s\n", $name, $value);
+ }
+ } elsif ($type =~ /^bits/) {
+ ($junk, $register) = split(/\s/, $type);
+ $bit = hex($value);
+ $addr = $addr{"$register"};
+ $body .= "BIT_AT(${register}_ADDR,$bit)\t$name;$rest\n";
+ } else {
+ #
+ # Other registers, bits and/or configurations.
+ #
+ if ($type eq 'other') {
+ #
+ # A known symbol.
+ #
+ $body .= sprintf("#define %-20s 0x%s$rest\n", $name, $value);
+ } else {
+ #
+ # A symbol that isn't defined in the data
+ # section at the end of the file. Let's
+ # add a comment so that we can add it later.
+ #
+ $body .= sprintf("#define %-20s 0x%s$rest\n",
+ $name, $value);
+ }
+ }
+ } elsif (/^\s*$/) {
+ #
+ # Blank line.
+ #
+ $body .= "\n";
+ } elsif (/__MAXRAM\s+H'([0-9a-fA-F]+)'/) {
+ $maxram .= "//\n// Memory organization.\n//\n"
+ . sprintf("#pragma maxram 0x%s\n\n", $1);
+ $pragmas = $maxram
+ . $ram{"p$processor"} . "\n"
+ . $pragmas;
+ $body .= "// $_";
+ } else {
+ #
+ # Anything else we'll just comment out.
+ #
+ $body .= "// $_";
+ }
+}
+$header .= <<EOT;
+//
+// Register Declarations for Microchip $processor Processor
+//