# To read pcb files, the pcb version (or the git source date) must be >= the file version
FileVersion[20070407]
-PCB["TeleLco" 450000 575000]
+PCB["TeleLco" 450000 375000]
Grid[100.0 0 0 0]
-Cursor[216100 0 0.000000]
+Cursor[7900 0 0.000000]
PolyArea[200000000.000000]
Thermal[0.500000]
DRC[500 1000 500 500 1500 650]
Via[245200 126300 3000 2000 0 1500 "" ""]
Via[248800 126300 3000 2000 0 1500 "" ""]
Via[194900 177800 3000 2000 0 1500 "" ""]
-Via[199000 177800 3000 2000 0 1500 "" ""]
-Via[196800 183800 3000 2000 0 1500 "" ""]
Via[135500 94900 3000 2000 0 1500 "" "thermal(1S)"]
Via[191700 109000 3000 2000 0 1500 "" ""]
Via[178500 109000 3000 2000 0 1500 "" "thermal(1S)"]
-Via[104500 47000 3000 2000 0 1500 "" ""]
-Via[104500 29800 3000 2000 0 1500 "" ""]
-Via[124500 29800 3000 2000 0 1500 "" ""]
-Via[124500 47000 3000 2000 0 1500 "" ""]
Via[174200 53800 3000 2000 0 1500 "" ""]
Via[191600 105100 3000 2000 0 1500 "" ""]
-Via[72555 115488 3000 2000 0 1500 "" ""]
-Via[83355 128088 3000 2000 0 1500 "" ""]
Via[69655 152188 3000 2000 0 1500 "" ""]
Via[81055 152188 3000 2000 0 1500 "" ""]
-Via[67055 109688 3000 2000 0 1500 "" ""]
Via[2155 119188 3000 2000 0 1500 "" "thermal(1X)"]
Via[12155 119288 3000 2000 0 1500 "" "thermal(1X)"]
Via[12155 139288 3000 2000 0 1500 "" "thermal(1X)"]
Via[2155 139188 3000 2000 0 1500 "" "thermal(1X)"]
Via[48855 144288 3000 2000 0 1500 "" ""]
-Via[39255 141188 3000 2000 0 1500 "" "thermal(1X)"]
-Via[50055 113788 3000 2000 0 1500 "" "thermal(1X)"]
-Via[23355 138688 3000 2000 0 1500 "" "thermal(0X,1X)"]
-Via[38555 124888 3000 2000 0 1500 "" "thermal(1X)"]
-Via[81755 147688 3000 2000 0 1500 "" "thermal(0X,1X)"]
-Via[66255 165488 3000 2000 0 1500 "" "thermal(1X)"]
-Via[55655 109588 3000 2000 0 1500 "" ""]
+Via[39255 141188 3000 2000 0 1500 "" "thermal(1S)"]
+Via[50055 113788 3000 2000 0 1500 "" "thermal(1S)"]
+Via[23355 138688 3000 2000 0 1500 "" "thermal(0X,1S)"]
+Via[38555 124888 3000 2000 0 1500 "" "thermal(1S)"]
+Via[81755 147688 3000 2000 0 1500 "" "thermal(0+,1S)"]
Via[48955 136488 3000 2000 0 1500 "" ""]
Via[46855 128688 3000 2000 0 1500 "" ""]
-Via[48955 155488 3000 2000 0 1500 "" "thermal(1X)"]
-Via[31755 104788 3000 2000 0 1500 "" "thermal(1X)"]
+Via[31755 104788 3000 2000 0 1500 "" "thermal(1S)"]
+Via[61300 47100 3000 2000 0 1500 "" ""]
+Via[74700 46900 3000 2000 0 1500 "" ""]
+Via[84500 46900 3000 2000 0 1500 "" ""]
+Via[194900 183900 3000 2000 0 1500 "" ""]
+Via[198500 183800 3000 2000 0 1500 "" ""]
+Via[56500 159100 3000 2000 0 1500 "" "thermal(1S)"]
+Via[74100 118100 3000 2000 0 1500 "" ""]
+Via[81100 118100 3000 2000 0 1500 "" ""]
+Via[70300 112300 3000 2000 0 1500 "" ""]
+Via[53700 117600 3000 2000 0 1500 "" ""]
Element["" "TDK_PS12" "U8" "TDK_PS12" 225000 277558 -4600 -3632 0 100 ""]
(
)
-Element["" "0402" "R12" "270" 120068 28254 -11523 -3080 0 100 ""]
+Element["" "0402" "R12" "270" 84500 52300 2941 -2988 0 100 ""]
(
- Pad[-393 -1574 393 -1574 1968 2000 2568 "1" "1" "square,warn"]
- Pad[-393 1574 393 1574 1968 2000 2568 "2" "2" "square"]
+ Pad[-393 1574 393 1574 1968 2000 2568 "1" "1" "square"]
+ Pad[-393 -1574 393 -1574 1968 2000 2568 "2" "2" "square"]
)
-Element["" "0402" "R13" "270" 99500 28200 -11123 -2980 0 100 ""]
+Element["" "0402" "R13" "270" 74700 52300 -10823 -3080 0 100 ""]
(
- Pad[-393 -1574 393 -1574 1968 2000 2568 "1" "1" "square,warn"]
- Pad[-393 1574 393 1574 1968 2000 2568 "2" "2" "square"]
+ Pad[-393 1574 393 1574 1968 2000 2568 "1" "1" "square"]
+ Pad[-393 -1574 393 -1574 1968 2000 2568 "2" "2" "square"]
)
Element["" "sma-edge" "J8" "SMA" 400 132200 300 1300 1 10 ""]
(
- Pad[3000 7000 13000 7000 6000 800 6600 "2" "2" "selected,square,nopaste"]
- Pad[3000 -3000 13000 -3000 6000 800 6600 "1" "1" "selected,square,nopaste"]
- Pad[3000 -13000 13000 -13000 6000 800 6600 "2" "2" "selected,square,nopaste"]
+ Pad[3000 7000 13000 7000 6000 800 6600 "2" "2" "square,nopaste"]
+ Pad[3000 -3000 13000 -3000 6000 800 6600 "1" "1" "square,nopaste"]
+ Pad[3000 -13000 13000 -13000 6000 800 6600 "2" "2" "square,nopaste"]
)
Pad[-6889 20865 -6889 24408 1181 787 1811 "PA5/SPI1_SCK/ADC_IN5/DAC_OUT2/TIM2_CH1_ETR" "21" "square,edge2"]
Pad[-24408 4920 -20865 4920 1181 787 1811 "PC3/ADC_IN13" "11" "square"]
Pad[20866 4920 24409 4920 1181 787 1811 "PC7/TIM3_CH2" "38" "square,edge2"]
- Pad[-4920 -24409 -4920 -20866 1181 787 1811 "PB7/I2C1_SDA/TIM4_CH2/USART1_RX/PVD_IN" "59" "square,warn"]
+ Pad[-4920 -24409 -4920 -20866 1181 787 1811 "PB7/I2C1_SDA/TIM4_CH2/USART1_RX/PVD_IN" "59" "square"]
Pad[-4920 20865 -4920 24408 1181 787 1811 "PA6/SPI1_MISO_ADC_IN6/TIM3_CH1/TIM10_CH1" "22" "square,edge2"]
Pad[-24408 2952 -20865 2952 1181 787 1811 "PC2/ADC_IN12" "10" "square"]
Pad[20866 2952 24409 2952 1181 787 1811 "PC8/TIM3_CH3" "39" "square,edge2"]
- Pad[-2952 -24409 -2952 -20866 1181 787 1811 "PB6/I2C1_SCL/TIM4_CH1/USART1_TX" "58" "square,warn"]
+ Pad[-2952 -24409 -2952 -20866 1181 787 1811 "PB6/I2C1_SCL/TIM4_CH1/USART1_TX" "58" "square"]
Pad[-2952 20865 -2952 24408 1181 787 1811 "PA7/SPI1_MOSI/ADC_IN7/TIM3_CH2/TIM11_CH1" "23" "square,edge2"]
Pad[-24408 983 -20865 983 1181 787 1811 "PC1/ADC_IN11" "9" "square"]
Pad[20866 983 24409 983 1181 787 1811 "PC9/TIM3_CH4" "40" "square,edge2"]
)
-Element["onsolder" "100mil-led" "D8" "green" 75000 12500 18600 -3100 2 100 "auto"]
+Element["onsolder" "100mil-led" "D8" "green" 125000 12500 18600 -3100 2 100 "auto"]
(
- Pin[-5000 0 7000 1500 8500 3500 "1" "1" "square,warn"]
+ Pin[-5000 0 7000 1500 8500 3500 "1" "1" "square"]
Pin[5000 0 7000 1500 8500 3500 "2" "2" "thermal(1X)"]
ElementLine [9900 -5700 9900 5700 1000]
ElementArc [0 0 11400 11400 210 300 1000]
)
-Element["onsolder" "100mil-led" "D1" "red" 125000 12500 18500 -3000 2 100 "auto"]
+Element["onsolder" "100mil-led" "D1" "red" 75000 12500 18500 -3000 2 100 "auto"]
(
- Pin[-5000 0 7000 1500 8500 3500 "1" "1" "square,warn"]
+ Pin[-5000 0 7000 1500 8500 3500 "1" "1" "square"]
Pin[5000 0 7000 1500 8500 3500 "2" "2" "thermal(1X)"]
ElementLine [9900 -5700 9900 5700 1000]
ElementArc [0 0 11400 11400 210 300 1000]
)
-Element["" "0402" "R12" "270" 81087 92434 2413 -2972 0 100 ""]
-(
- Pad[-393 1574 393 1574 1968 2000 2568 "1" "1" "square,warn"]
- Pad[-393 -1574 393 -1574 1968 2000 2568 "2" "2" "square"]
-
- )
-
Element["" "ABM8" "X1" "48mhz" 40920 109330 -3069 2800 1 100 ""]
(
Pad[-5019 -3642 -4034 -3642 4134 -983 4734 "2" "2" "square"]
)
-Element["" "0402" "C36" "0.001uF" 66255 159962 1042 2509 1 100 ""]
-(
- Pad[-393 1574 393 1574 1968 2000 2568 "1" "1" "square,warn"]
- Pad[-393 -1574 393 -1574 1968 2000 2568 "2" "2" "square,warn"]
-
- )
-
Element["" "TI-QFN36" "U9" "CC1111" 63135 131608 -4240 -13360 1 100 ""]
(
Pin[-5919 5919 2900 2500 0 1500 "GND Exposed" "37" "via,thermal(1S)"]
)
-Element["" "0402" "R13" "270" 75787 92434 -11487 -2872 0 100 ""]
-(
- Pad[-393 1574 393 1574 1968 2000 2568 "1" "1" "square,warn"]
- Pad[-393 -1574 393 -1574 1968 2000 2568 "2" "2" "square"]
-
- )
-
Element["" "0402" "C12" "0.1uF" 81742 142287 872 6161 1 100 ""]
(
Pad[-393 1574 393 1574 1968 2000 2568 "1" "1" "square"]
Element["" "0-215079-4" "J6" "Debug" 38300 17900 0 0 0 100 ""]
(
- Pin[0 10000 6299 1200 7299 3150 "1" "1" "square,edge2"]
+ Pin[0 10000 6299 1200 7299 3150 "1" "1" "square,edge2,thermal(1X)"]
Pin[5000 0 6299 1200 7299 3150 "2" "2" "edge2"]
Pin[10000 10000 6299 1200 7299 3150 "3" "3" "edge2"]
Pin[15000 0 6299 1200 7299 3150 "4" "4" "edge2"]
ElementLine [24429 -5038 -9428 -5038 600]
)
-Rat[83355 126288 1 110900 98200 0 ""]
-Rat[129300 159600 0 75455 153488 0 ""]
-Rat[130500 156400 0 78455 154188 0 ""]
-Rat[53300 17900 1 59199 106632 0 ""]
-Rat[48300 27900 1 61167 106200 0 ""]
-Rat[38300 27900 1 446600 372500 1 "via"]
-Rat[129900 158000 0 72255 154888 0 ""]
-Rat[128600 161200 0 73855 154188 0 ""]
-Rat[114100 100500 0 85755 129088 0 ""]
-Rat[95100 163800 0 72307 163888 0 ""]
-Rat[139400 82000 0 43300 17900 1 ""]
-Rat[119675 26680 0 81087 94008 0 ""]
-Rat[84126 26626 0 77475 94008 0 ""]
-Rat[120068 26680 0 104500 29800 1 ""]
-Rat[99500 26626 0 119675 29828 0 ""]
Layer(1 "top")
(
Line[118500 104300 119700 103100 1000 2000 "clearline"]
Line[118500 139800 118500 104300 1000 2000 "clearline"]
Line[116850 104250 115700 103100 1000 2000 "clearline"]
Line[116850 140450 116850 104250 1000 2000 "clearline"]
- Line[114100 100500 136100 100500 1000 2000 "clearline"]
Line[134300 150200 134500 150200 1000 2000 "clearline"]
Line[118500 93700 119700 94900 1000 2000 "clearline"]
Line[118500 66900 118500 93700 1000 2000 "clearline"]
Line[116950 93650 115700 94900 1000 2000 "clearline"]
Line[116950 67650 116950 93650 1000 2000 "clearline"]
- Line[153700 98200 113100 98200 2500 2000 "clearline"]
Line[175600 182800 179400 186600 1000 2000 "clearline"]
Line[179600 186600 179400 186600 1000 2000 "clearline"]
Line[179500 182200 178450 181150 1000 2000 "clearline"]
Line[213964 146900 213954 146890 1000 2000 "clearline"]
Line[213954 144921 218321 144921 1000 2000 "clearline"]
Line[218321 144921 222800 149400 1000 2000 "clearline"]
- Line[222800 162300 201300 183800 1000 2000 "clearline"]
Line[222800 149400 222800 162300 1000 2000 "clearline"]
Line[310800 252100 310800 153300 2500 2000 "clearline"]
Line[310800 153300 274000 116500 2500 2000 "clearline"]
Line[245200 188900 284400 228100 1000 2000 "clearline"]
Line[248800 126300 248800 182500 1000 2000 "clearline"]
Line[248800 182500 294400 228100 1000 2000 "clearline"]
- Line[159700 156400 130500 156400 1000 2000 "clearline"]
- Line[157600 158000 129900 158000 1000 2000 "clearline"]
- Line[129900 158000 98300 126400 1000 2000 "clearline"]
- Line[156900 159600 129300 159600 1000 2000 "clearline"]
- Line[129300 159600 97700 128000 1000 2000 "clearline"]
- Line[202600 177800 199000 177800 1000 2000 "clearline"]
- Line[194900 177800 197500 180400 1000 2000 "clearline"]
- Line[197500 180400 202300 180400 1000 2000 "clearline"]
- Line[196800 183800 201300 183800 1000 2000 "clearline"]
- Line[156300 161200 128600 161200 1000 2000 "clearline"]
- Line[128600 161200 97000 129600 1000 2000 "clearline"]
- Line[95900 118700 114100 100500 1000 2000 "clearline"]
Line[35600 229700 86400 229700 1000 2000 "clearline"]
Line[86400 229700 141900 174200 1000 2000 "clearline"]
Line[145500 171600 140800 171600 1000 2000 "clearline"]
Line[192100 87100 192800 86400 1000 2000 "clearline"]
Line[192800 86400 192800 66600 1000 2000 "clearline"]
Line[192800 66600 175700 49500 1000 2000 "clearline"]
- Line[175700 49500 127000 49500 1000 2000 "clearline"]
- Line[127000 49500 124500 47000 1000 2000 "clearline"]
Line[186396 113427 186396 99304 1000 2000 "clearline"]
Line[186396 99304 190500 95200 1000 2000 "clearline"]
Line[190500 95200 190500 86400 1000 2000 "clearline"]
Line[190500 86400 191200 85700 1000 2000 "clearline"]
Line[191200 85700 191200 67200 1000 2000 "clearline"]
Line[191200 67200 175100 51100 1000 2000 "clearline"]
- Line[175100 51100 108600 51100 1000 2000 "clearline"]
- Line[108600 51100 104500 47000 1000 2000 "clearline"]
Line[174200 53800 167900 53800 1000 2000 "clearline"]
Line[167900 53800 139400 82300 1000 2000 "clearline"]
- Line[104500 29800 99526 29800 1000 2000 "clearline"]
- Line[99526 29800 99500 29774 1000 2000 "clearline"]
- Line[99500 26626 84126 26626 1000 2000 "clearline"]
- Line[84126 26626 70000 12500 1000 2000 "clearline"]
- Line[124500 29800 120096 29800 1000 2000 "clearline"]
- Line[120096 29800 120068 29828 1000 2000 "clearline"]
- Line[120068 26680 120068 12568 1000 2000 "clearline"]
Line[120068 12568 120000 12500 1000 2000 "clearline"]
- Line[134300 163800 95100 163800 1000 2000 "clearline"]
- Line[130500 156400 98600 124500 1000 2000 "clearline"]
- Line[113200 98200 110900 98200 2500 2000 "clearline"]
- Line[110900 98200 91000 118100 2500 2000 "clearline"]
Line[192100 105100 191700 105500 1000 2000 "clearline"]
Line[213000 105100 192100 105100 1000 2000 "clearline"]
Line[188364 113427 188364 99636 1000 2000 "clearline"]
Line[192100 95900 188364 99636 1000 2000 "clearline"]
- Line[79527 90860 79255 90588 1000 2000 "clearline"]
- Line[81087 90860 79527 90860 1000 2000 "clearline"]
- Line[80135 94008 79255 94888 1000 2000 "clearline"]
- Line[81087 94008 80135 94008 1000 2000 "clearline"]
- Line[77483 90860 77655 90688 1000 2000 "clearline"]
- Line[75787 90860 77483 90860 1000 2000 "clearline"]
- Line[77475 94008 77655 94188 1000 2000 "clearline"]
- Line[75787 94008 77475 94008 1000 2000 "clearline"]
- Line[83305 139150 81742 140713 1000 2000 "clearline"]
- Line[83305 128238 83305 139150 1000 2000 "clearline"]
- Line[79255 133088 79255 94888 1000 2000 "clearline"]
- Line[76799 135544 79255 133088 1000 2000 "clearline"]
Line[74060 135544 76799 135544 1000 2000 "clearline"]
- Line[77655 132388 77655 94200 1000 2000 "clearline"]
- Line[76467 133576 77655 132388 1000 2000 "clearline"]
Line[74060 133576 76467 133576 1000 2000 "clearline"]
Line[81055 152188 82455 152188 1000 2000 "clearline"]
- Line[72307 161940 68855 158488 1000 2000 "clearline"]
- Line[72307 163888 72307 161940 1000 2000 "clearline"]
- Line[75455 163888 77855 163888 1000 2000 "clearline"]
- Line[78655 161288 72255 154888 1000 2000 "clearline"]
- Line[79355 159688 73855 154188 1000 2000 "clearline"]
- Line[80055 158088 75455 153488 1000 2000 "clearline"]
- Line[80755 156488 78455 154188 1000 2000 "clearline"]
- Line[65055 142581 65104 142532 1000 2000 "clearline"]
- Line[65055 145288 65055 142581 1000 2000 "clearline"]
- Line[68055 148288 65055 145288 1000 2000 "clearline"]
- Line[69655 148288 68055 148288 1000 2000 "clearline"]
- Line[69655 152188 69655 148288 1000 2000 "clearline"]
- Line[67055 142549 67072 142532 1000 2000 "clearline"]
- Line[67055 144988 67055 142549 1000 2000 "clearline"]
- Line[68755 146688 67055 144988 1000 2000 "clearline"]
- Line[70755 146688 68755 146688 1000 2000 "clearline"]
- Line[72255 148188 70755 146688 1000 2000 "clearline"]
- Line[72255 154888 72255 148188 1000 2000 "clearline"]
- Line[69055 142546 69041 142532 1000 2000 "clearline"]
- Line[69055 144488 69055 142546 1000 2000 "clearline"]
- Line[69655 145088 69055 144488 1000 2000 "clearline"]
- Line[71355 145088 69655 145088 1000 2000 "clearline"]
- Line[73855 147588 71355 145088 1000 2000 "clearline"]
- Line[73855 154188 73855 147588 1000 2000 "clearline"]
- Line[61167 120683 61167 106200 1000 2000 "clearline"]
- Line[59199 120683 59199 106632 1000 2000 "clearline"]
- Line[67072 109705 67055 109688 1000 2000 "clearline"]
- Line[67072 120683 67072 109705 1000 2000 "clearline"]
- Line[67072 115488 72555 115488 1000 2000 "clearline"]
- Line[75455 146978 71009 142532 1000 2000 "clearline"]
- Line[75455 146978 75455 153488 1000 2000 "clearline"]
Line[78455 143876 74060 139481 1000 2000 "clearline"]
Line[78455 143876 78455 154188 1000 2000 "clearline"]
- Line[66255 158488 68855 158488 1000 2000 "clearline"]
- Line[66255 153988 66255 158388 1000 2000 "clearline"]
- Line[65181 152914 66255 153988 1000 2000 "clearline"]
- Line[62455 152914 65181 152914 1000 2000 "clearline"]
- Line[66255 161536 66255 165488 1000 2000 "clearline"]
- Line[62455 156062 62455 158488 1000 2000 "clearline"]
Line[37753 133576 37055 134274 1000 2000 "clearline"]
Line[37107 130436 37055 130488 1000 2000 "clearline"]
Line[37707 120688 37707 124040 1000 2000 "clearline"]
Line[49880 137513 49055 136688 1000 2000 "clearline"]
Line[49880 137513 51286 137513 1000 2000 "clearline"]
Line[40555 126888 37707 124040 1000 2000 "clearline"]
- Line[52955 117088 55555 114488 1000 2000 "clearline"]
- Line[52955 117088 52955 119588 1000 2000 "clearline"]
- Line[51907 120636 52955 119588 1000 2000 "clearline"]
- Line[50541 120636 51907 120636 1000 2000 "clearline"]
Line[37055 128936 34893 126774 1000 2000 "clearline"]
Line[37753 133576 51286 133576 1000 2000 "clearline"]
Line[43789 128688 46355 128688 1000 2000 "clearline"]
Line[12855 129288 16635 129288 1000 2000 "clearline"]
Line[36941 141188 41307 141188 1000 2000 "clearline"]
Line[46755 120588 49688 120588 1000 2000 "clearline"]
- Line[61167 152319 62062 153214 1000 2000 "clearline"]
- Line[61167 143457 61167 152319 1000 2000 "clearline"]
Line[26355 132654 26441 132740 1000 2000 "clearline"]
Line[21441 129802 21441 132640 1000 2000 "clearline"]
Line[36941 141188 36641 141488 1000 2000 "clearline"]
Line[45241 141188 44955 141474 1000 2000 "clearline"]
Line[20283 129674 23207 129674 1000 2000 "clearline"]
Line[37055 135060 37055 138240 1000 2000 "clearline"]
- Line[62655 156555 62848 156362 1000 2000 "clearline"]
Line[46748 117414 49681 117414 1000 2000 "clearline"]
Line[49681 117414 49755 117488 1000 2000 "clearline"]
Line[49681 120562 49755 120636 1000 2000 "clearline"]
Line[45241 141188 49655 141188 1000 2000 "clearline"]
Line[45655 136488 44855 137288 1000 2000 "clearline"]
Line[34893 121022 34893 123626 1000 2000 "clearline"]
- Line[55555 109588 55555 114588 1000 2000 "clearline"]
Line[26841 129188 26355 129674 1000 2000 "clearline"]
Line[20283 129674 20269 129688 1000 2000 "clearline"]
Line[26841 129188 29455 129188 1000 2000 "clearline"]
Line[49638 127671 51286 127671 1000 2000 "clearline"]
Line[50169 125702 47755 123288 1000 2000 "clearline"]
Line[50169 125702 51286 125702 1000 2000 "clearline"]
- Line[54455 156436 48855 156388 1000 2000 "clearline"]
Line[21441 135788 21441 136974 1000 2000 "clearline"]
Line[21441 136974 23355 138888 1000 2000 "clearline"]
- Line[55289 156388 55241 156436 1000 2000 "clearline"]
- Line[55289 156388 58269 156388 1000 2000 "clearline"]
Line[51286 131608 38309 131708 1000 2000 "clearline"]
Line[39955 116440 39955 121488 1000 2000 "clearline"]
Line[39955 116240 36486 112771 1000 2000 "clearline"]
Line[50069 113774 49141 114702 1000 2000 "clearline"]
Line[41755 108588 41755 120488 1000 2000 "clearline"]
Line[42055 108588 44955 105688 1000 2000 "clearline"]
- Line[45755 152388 54455 152388 1000 2000 "clearline"]
- Line[45755 152388 45755 158488 1000 2000 "clearline"]
- Line[45755 158488 62655 158488 1000 2000 "clearline"]
Line[33918 110988 35901 112971 1000 2000 "clearline"]
Line[31841 110988 33918 110988 1000 2000 "clearline"]
Line[47992 107740 45940 105688 1000 2000 "clearline"]
Line[49141 114702 49141 117388 1000 2000 "clearline"]
Line[45655 136488 48655 136488 1000 2000 "clearline"]
Line[34893 121022 34559 120688 1000 2000 "clearline"]
- Line[91155 174288 91155 174388 1000 2000 "clearline"]
- Line[85755 129088 85755 129388 1000 2000 "clearline"]
- Line[85755 129388 84855 130288 1000 2000 "clearline"]
Line[84855 130288 84855 149788 1000 2000 "clearline"]
Line[84855 149788 82455 152188 1000 2000 "clearline"]
+ Line[43300 17900 53600 7600 1000 2000 "clearline"]
+ Line[53600 7600 164000 7600 1000 2000 "clearline"]
+ Line[164000 7600 174200 17800 1000 2000 "clearline"]
+ Line[53300 17900 51000 17900 1000 2000 "clearline"]
+ Line[51000 17900 43600 25300 1000 2000 "clearline"]
+ Line[43600 25300 43600 33400 1000 2000 "clearline"]
+ Line[43600 33400 44700 34500 1000 2000 "clearline"]
+ Line[44700 34500 44700 38700 1000 2000 "clearline"]
+ Line[74700 46900 74700 50726 1000 2000 "clearline"]
+ Line[84500 46900 84500 50726 1000 2000 "clearline"]
+ Line[74700 53874 74700 53900 1000 2000 "clearline"]
+ Line[74700 53900 76700 55900 1000 2000 "clearline"]
+ Line[76700 55900 76700 133376 1000 2000 "clearline"]
+ Line[76700 133376 76500 133576 1000 2000 "clearline"]
+ Line[84500 53874 84500 53900 1000 2000 "clearline"]
+ Line[84500 53900 78500 59900 1000 2000 "clearline"]
+ Line[78500 59900 78500 133844 1000 2000 "clearline"]
+ Line[78500 133844 76800 135544 1000 2000 "clearline"]
+ Line[134300 163800 77100 163800 1000 2000 "clearline"]
+ Line[77100 163800 61200 147900 1000 2000 "clearline"]
+ Line[61200 147900 61200 142565 1000 2000 "clearline"]
+ Line[61200 142565 61167 142532 1000 2000 "clearline"]
+ Line[156300 161200 78555 161200 1000 2000 "clearline"]
+ Line[156900 159600 79255 159600 1000 2000 "clearline"]
+ Line[157600 158000 79955 158000 1000 2000 "clearline"]
+ Line[159700 156400 80655 156400 1000 2000 "clearline"]
+ Line[80655 156400 78455 154200 1000 2000 "clearline"]
+ Line[194900 177800 202600 177800 1000 2000 "clearline"]
+ Line[202350 180350 198450 180350 1000 2000 "clearline"]
+ Line[198450 180350 194900 183900 1000 2000 "clearline"]
+ Line[198500 183800 201300 183800 1000 2000 "clearline"]
+ Line[201300 183800 222800 162300 1000 2000 "clearline"]
+ Line[153700 98200 113243 98200 2500 2000 "clearline"]
+ Line[136100 100500 114655 100500 1000 2000 "clearline"]
+ Line[114655 100500 84855 130300 1000 2000 "clearline"]
+ Line[58448 155936 58448 157152 1000 2000 "clearline"]
+ Line[58448 157152 56500 159100 1000 2000 "clearline"]
+ Line[54455 155962 54455 157055 1000 2000 "clearline"]
+ Line[54455 157055 56500 159100 1000 2000 "clearline"]
+ Line[75100 60900 61300 47100 1000 2000 "clearline"]
+ Line[73500 67500 44700 38700 1000 2000 "clearline"]
+ Line[113300 98200 101000 98200 2500 2000 "clearline"]
+ Line[101000 98200 81100 118100 2500 2000 "clearline"]
+ Line[81742 140713 81742 118742 1000 2000 "clearline"]
+ Line[81742 118742 81100 118100 1000 2000 "clearline"]
+ Line[67072 120683 67072 119328 1000 2000 "clearline"]
+ Line[67072 119328 68300 118100 1000 2000 "clearline"]
+ Line[68300 118100 74100 118100 1000 2000 "clearline"]
+ Line[61167 120683 61167 119333 1000 2000 "clearline"]
+ Line[61167 119333 64000 116500 1000 2000 "clearline"]
+ Line[64000 116500 72000 116500 1000 2000 "clearline"]
+ Line[72000 116500 75100 113400 1000 2000 "clearline"]
+ Line[75100 113400 75100 60900 1000 2000 "clearline"]
+ Line[59199 120683 59199 119101 1000 2000 "clearline"]
+ Line[59199 119101 63400 114900 1000 2000 "clearline"]
+ Line[63400 114900 71300 114900 1000 2000 "clearline"]
+ Line[71300 114900 73500 112700 1000 2000 "clearline"]
+ Line[73500 112700 73500 67500 1000 2000 "clearline"]
+ Line[70300 112300 60900 112300 1000 2000 "clearline"]
+ Line[60900 112300 52600 120600 1000 2000 "clearline"]
+ Line[52600 120600 50184 120600 1000 2000 "clearline"]
+ Line[50184 120600 50148 120636 1000 2000 "clearline"]
+ Line[53700 117600 54650 118550 1000 2000 "clearline"]
+ Line[65104 142532 65104 147637 1000 2000 "clearline"]
+ Line[65104 147637 69655 152188 1000 2000 "clearline"]
+ Line[67072 142532 67072 145872 1000 2000 "clearline"]
+ Line[67072 145872 72300 151100 1000 2000 "clearline"]
+ Line[72300 151100 72300 154900 1000 2000 "clearline"]
+ Line[72300 154900 78600 161200 1000 2000 "clearline"]
+ Line[69041 142532 69041 145541 1000 2000 "clearline"]
+ Line[69041 145541 73900 150400 1000 2000 "clearline"]
+ Line[73900 150400 73900 154245 1000 2000 "clearline"]
+ Line[73900 154245 79255 159600 1000 2000 "clearline"]
+ Line[71009 142532 71009 145009 1000 2000 "clearline"]
+ Line[71009 145009 75500 149500 1000 2000 "clearline"]
+ Line[75500 149500 75500 153500 1000 2000 "clearline"]
+ Line[75500 153500 80000 158000 1000 2000 "clearline"]
)
Layer(2 "bottom")
(
Line[282900 296500 283000 296400 1000 2000 "clearline"]
Line[283000 296400 283000 291400 1000 2000 "clearline"]
Line[152700 150300 152700 163800 1000 2000 "clearline"]
- Line[178100 173500 194900 173500 1000 2000 "clearline"]
Line[204400 256500 204400 228100 1000 2000 "clearline"]
Line[214400 246500 214400 228100 1000 2000 "clearline"]
Line[222500 143000 235400 130100 1000 2000 "clearline"]
Line[241600 113000 241600 126300 1000 2000 "clearline"]
Line[245200 113000 245200 126300 1000 2000 "clearline"]
Line[248800 113000 248800 126300 1000 2000 "clearline"]
- Line[179600 177800 194900 177800 1000 2000 "clearline"]
- Line[179600 182200 194600 182200 1000 2000 "clearline"]
- Line[194600 182200 199000 177800 1000 2000 "clearline"]
- Line[179600 186600 194000 186600 1000 2000 "clearline"]
- Line[194000 186600 196800 183800 1000 2000 "clearline"]
Line[147100 94000 147100 133800 1000 2000 "clearline"]
Line[191700 109000 191700 122200 1000 2000 "clearline"]
Line[191700 122200 190300 123600 1000 2000 "clearline"]
Line[171000 105500 163300 113200 1000 2000 "clearline"]
- Line[124500 29800 124500 47000 1000 2000 "clearline"]
- Line[104500 29800 104500 47000 1000 2000 "clearline"]
Line[174200 17800 174200 53800 1000 2000 "clearline"]
Line[191700 105500 171000 105500 1000 2000 "clearline"]
- Line[83355 126288 72555 115488 1000 2000 "clearline"]
- Line[83355 128088 83355 126288 1000 2000 "clearline"]
Line[69655 152188 81055 152188 1000 2000 "clearline"]
- Line[55655 109588 67055 109588 1000 2000 "clearline"]
- Line[55655 109588 55655 120088 1000 2000 "clearline"]
- Line[55655 120088 47055 128688 1000 2000 "clearline"]
Line[48955 130588 47055 128688 1000 2000 "clearline"]
Line[48855 144288 48955 130588 1000 2000 "clearline"]
+ Line[48300 27900 54400 34000 1000 2000 "clearline"]
+ Line[54400 34000 54400 40200 1000 2000 "clearline"]
+ Line[54400 40200 61300 47100 1000 2000 "clearline"]
+ Line[74700 46900 74700 17200 1000 2000 "clearline"]
+ Line[74700 17200 70000 12500 1000 2000 "clearline"]
+ Line[84500 46900 84500 32900 1000 2000 "clearline"]
+ Line[84500 32900 104900 12500 1000 2000 "clearline"]
+ Line[104900 12500 120000 12500 1000 2000 "clearline"]
+ Line[179600 177800 194900 177800 1000 2000 "clearline"]
+ Line[179600 186600 192200 186600 1000 2000 "clearline"]
+ Line[192200 186600 194900 183900 1000 2000 "clearline"]
+ Line[179600 182200 192800 182200 1000 2000 "clearline"]
+ Line[192800 182200 194100 180900 1000 2000 "clearline"]
+ Line[194100 180900 195600 180900 1000 2000 "clearline"]
+ Line[195600 180900 198500 183800 1000 2000 "clearline"]
+ Line[178100 173500 194900 173500 1000 2000 "clearline"]
+ Line[74100 118100 81100 118100 1000 2000 "clearline"]
+ Line[74100 118100 74100 116100 1000 2000 "clearline"]
+ Line[74100 116100 70300 112300 1000 2000 "clearline"]
+ Line[53700 117600 53700 121843 1000 2000 "clearline"]
+ Line[53700 121843 46855 128688 1000 2000 "clearline"]
Polygon("clearpoly")
(
[446600 372500] [1600 372500] [1600 2500] [446600 2500]
Layer(5 "silk")
(
Text[167600 4400 0 100 "stm32l" "clearline"]
+ Text[34100 4500 0 100 "cc1111" "clearline"]
)
NetList()
(
)
Net("c2" "(unknown)")
(
- Connect("C204-2")
- Connect("L203-1")
Connect("U7-34")
Connect("U9-36")
)
- Net("c2_f" "(unknown)")
- (
- Connect("C205-2")
- Connect("L203-2")
- )
Net("com_0" "(unknown)")
(
Connect("U7-41")
)
Net("cs_radio" "(unknown)")
(
- Connect("C208-2")
- Connect("L205-1")
Connect("U7-33")
Connect("U9-1")
)
- Net("cs_radio_f" "(unknown)")
- (
- Connect("C209-2")
- Connect("L205-2")
- )
Net("debug_clock" "(unknown)")
(
Connect("J6-4")
Connect("C33-2")
Connect("C36-1")
Connect("C37-1")
- Connect("C200-1")
- Connect("C201-1")
- Connect("C202-1")
- Connect("C203-1")
- Connect("C204-1")
- Connect("C205-1")
- Connect("C206-1")
- Connect("C207-1")
- Connect("C208-1")
- Connect("C209-1")
Connect("C601-2")
Connect("C602-2")
Connect("C603-1")
)
Net("miso2" "(unknown)")
(
- Connect("C206-2")
- Connect("L204-1")
Connect("U7-35")
Connect("U9-34")
)
- Net("miso2_f" "(unknown)")
- (
- Connect("C207-2")
- Connect("L204-2")
- )
Net("mosi2" "(unknown)")
(
- Connect("C202-2")
- Connect("L202-1")
Connect("U7-36")
Connect("U9-35")
)
- Net("mosi2_f" "(unknown)")
- (
- Connect("C203-2")
- Connect("L202-2")
- )
Net("pad_a" "(unknown)")
(
Connect("C3-2")
)
Net("radio_int" "(unknown)")
(
- Connect("C200-2")
- Connect("L200-1")
Connect("U7-3")
Connect("U9-33")
)
- Net("radio_int_f" "(unknown)")
- (
- Connect("C201-2")
- Connect("L200-2")
- )
Net("reset_n" "(unknown)")
(
Connect("C610-2")