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Matt Hsu <matt@0xlab.org> cortex_a8_exec_opcode is writing the ARM instruction into
authoroharboe <oharboe@b42882b7-edfa-0310-969c-e2dbd0fdcd60>
Wed, 26 Aug 2009 19:21:26 +0000 (19:21 +0000)
committeroharboe <oharboe@b42882b7-edfa-0310-969c-e2dbd0fdcd60>
Wed, 26 Aug 2009 19:21:26 +0000 (19:21 +0000)
commit56a04a3413a6427ef83dc18e3f7c7c13fd217113
tree3fc33bae7ef2da9d2dc6321b3b79947494c99411tree | snapshot
parentf36d0083def304410418a174e140469a771a44a2commit | diff
Matt Hsu <matt@0xlab.org> cortex_a8_exec_opcode is writing the ARM instruction into
the ITR register but it will only be executed when the DSCR[13]
bit is set. The documentation is a bit weird as it classifies
the DSCR as read-only but the pseudo code is writing to it as
well. This is working on a beagleboard.

git-svn-id: svn://svn.berlios.de/openocd/trunk@2634 b42882b7-edfa-0310-969c-e2dbd0fdcd60
src/target/cortex_a8.c diff | blob | history
openocd with support for Altus Metrum targets