- only if "reset halt" or "reset init" are issued will the reset vector be set up
authoroharboe <oharboe@b42882b7-edfa-0310-969c-e2dbd0fdcd60>
Mon, 7 Apr 2008 10:48:44 +0000 (10:48 +0000)
committeroharboe <oharboe@b42882b7-edfa-0310-969c-e2dbd0fdcd60>
Mon, 7 Apr 2008 10:48:44 +0000 (10:48 +0000)
commit2b7504c27947a139473986fa65d977701addb88d
treefd1d9129478649b78afe7709fd211e773ce80ae2
parenta2c45daf78cd243d16ce2a41531670741a19d310
- only if "reset halt" or "reset init" are issued will the reset vector be set up
- If communication fails during assert between assert/deassert and during
assert, warnings are printed. The warning suggests using srst_only if the
clock locks up as that would allow the reset vector to be set up before
asserting reset.

git-svn-id: svn://svn.berlios.de/openocd/trunk@544 b42882b7-edfa-0310-969c-e2dbd0fdcd60
src/target/arm7_9_common.c
src/target/target.c