X-Git-Url: https://git.gag.com/?a=blobdiff_plain;f=tcl%2Ftarget%2Fzynq_7000.cfg;h=0272587c1e7e6fda8ec3f2bc2910a7d14fa10ce8;hb=e6505b04892ccacf75603c3d173616f5d92809e7;hp=1562768c5387ff687252d9f605c3bfadc1ad4599;hpb=abd78a0ff8df04cd46a68ff8a716bf1eda215af0;p=fw%2Fopenocd

diff --git a/tcl/target/zynq_7000.cfg b/tcl/target/zynq_7000.cfg
index 1562768c5..0272587c1 100644
--- a/tcl/target/zynq_7000.cfg
+++ b/tcl/target/zynq_7000.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
 #
 # Xilinx Zynq-7000 All Programmable SoC
 #
@@ -23,7 +25,7 @@ target create ${_TARGETNAME}1 cortex_a -dap $_CHIPNAME.dap \
     -coreid 1 -dbgbase 0x80092000
 target smp ${_TARGETNAME}0 ${_TARGETNAME}1
 
-adapter_khz 1000
+adapter speed 1000
 
 ${_TARGETNAME}0 configure -event reset-assert-post "cortex_a dbginit"
 ${_TARGETNAME}1 configure -event reset-assert-post "cortex_a dbginit"