X-Git-Url: https://git.gag.com/?a=blobdiff_plain;f=tcl%2Ftarget%2Fti_k3.cfg;h=325ee00042a02242e2744f49998d4475e980449f;hb=2b17a128841c9431f17aaad844f416eccd24f63f;hp=d2aa53160c09090bbec8ad07c9b5218e84094d73;hpb=431dd885368ec90fe2f74ba50bbe70577844615b;p=fw%2Fopenocd

diff --git a/tcl/target/ti_k3.cfg b/tcl/target/ti_k3.cfg
index d2aa53160..325ee0004 100644
--- a/tcl/target/ti_k3.cfg
+++ b/tcl/target/ti_k3.cfg
@@ -152,7 +152,7 @@ cti create $_CTINAME.m3 -dap $_CHIPNAME.dap -ap-num 7 -baseaddr [lindex $CM3_CTI
 target create $_TARGETNAME.m3 cortex_m -dap $_CHIPNAME.dap -ap-num 7 -defer-examine
 $_TARGETNAME.m3 configure -event reset-assert { }
 
-proc m3_up { args } {
+proc m3_up {} {
 	# To access M3, we need to enable the JTAG access for the same.
 	# Ensure Power-AP unlocked
 	$::_CHIPNAME.dap apreg 3 [lindex $::_m3_ap_unlock_offsets 0] 0x00190000
@@ -245,7 +245,7 @@ if { $_mcu_m4_cores != 0 } {
 	target create $_TARGETNAME.m4 cortex_m -dap $_CHIPNAME.dap -ap-num 8 -defer-examine
 	$_TARGETNAME.m4 configure -event reset-assert { }
 
-	proc m4_up { args } {
+	proc m4_up {} {
 		# To access M4, we need to enable the JTAG access for the same.
 		# Ensure Power-AP unlocked
 		$::_CHIPNAME.dap apreg 3 [lindex $::_m4_ap_unlock_offsets 0] 0x00190000