X-Git-Url: https://git.gag.com/?a=blobdiff_plain;f=tcl%2Ftarget%2Fstm32l.cfg;h=1fa06f0f4698fe3d26c80564ee76926309b75c0a;hb=1ea25b85bb8ad4b4ccde1b8bff0cffe24bbb2f97;hp=5c3d3686f4ad6a7ac60160263ed6219dfd06b7bc;hpb=da8ce5f2e193b8637202d56c69b22a158a12e32a;p=fw%2Fopenocd diff --git a/tcl/target/stm32l.cfg b/tcl/target/stm32l.cfg index 5c3d3686f..1fa06f0f4 100644 --- a/tcl/target/stm32l.cfg +++ b/tcl/target/stm32l.cfg @@ -1,43 +1,56 @@ # script for stm32l +# +# stm32 devices support both JTAG and SWD transports. +# +source [find target/swj-dp.tcl] + if { [info exists CHIPNAME] } { - set _CHIPNAME $CHIPNAME + set _CHIPNAME $CHIPNAME } else { - set _CHIPNAME stm32l + set _CHIPNAME stm32l } if { [info exists ENDIAN] } { - set _ENDIAN $ENDIAN + set _ENDIAN $ENDIAN } else { - set _ENDIAN little + set _ENDIAN little } # Work-area is a space in RAM used for flash programming -# By default use 14kB +# By default use 10kB if { [info exists WORKAREASIZE] } { - set _WORKAREASIZE $WORKAREASIZE + set _WORKAREASIZE $WORKAREASIZE } else { - set _WORKAREASIZE 0x3800 + set _WORKAREASIZE 0x2800 } # JTAG speed should be <= F_CPU/6. # F_CPU after reset is 2MHz, so use F_JTAG max = 333kHz -adapter_khz 100 +adapter_khz 300 adapter_nsrst_delay 100 -jtag_ntrst_delay 100 +if {[using_jtag]} { + jtag_ntrst_delay 100 +} #jtag scan chain -if { [info exists CPUTAPID ] } { +if { [info exists CPUTAPID] } { set _CPUTAPID $CPUTAPID } else { - # See STM Document RM0038 - # Section 24.6.3 - set _CPUTAPID 0x4ba00477 + if { [using_jtag] } { + # See STM Document RM0038 + # Section 24.6.3 + set _CPUTAPID 0x4ba00477 + } { + set _CPUTAPID1 0x2ba01477 + set _CPUTAPID2 0x0bc11477 + } } -jtag newtap $_CHIPNAME cpu -irlen 4 -ircapture 0x1 -irmask 0xf -expected-id $_CPUTAPID -if { [info exists BSTAPID ] } { +swj_newdap $_CHIPNAME cpu -irlen 4 -ircapture 0x1 -irmask 0xf -expected-id $_CPUTAPID1 -expected-id $_CPUTAPID2 + +if { [info exists BSTAPID] } { # FIXME this never gets used to override defaults... set _BSTAPID $BSTAPID } else { @@ -45,21 +58,25 @@ if { [info exists BSTAPID ] } { # Section 24.6.2 set _BSTAPID 0x06416041 } -jtag newtap $_CHIPNAME bs -irlen 5 -expected-id $_BSTAPID + +if {[using_jtag]} { + swj_newdap $_CHIPNAME bs -irlen 5 -expected-id $_BSTAPID +} set _TARGETNAME $_CHIPNAME.cpu -target create $_TARGETNAME cortex_m3 -endian $_ENDIAN -chain-position $_TARGETNAME +target create $_TARGETNAME cortex_m -endian $_ENDIAN -chain-position $_TARGETNAME $_TARGETNAME configure -work-area-phys 0x20000000 -work-area-size $_WORKAREASIZE -work-area-backup 0 - # flash size will be probed set _FLASHNAME $_CHIPNAME.flash flash bank $_FLASHNAME stm32lx 0x08000000 0 0 0 $_TARGETNAME -# if srst is not fitted use SYSRESETREQ to -# perform a soft reset -cortex_m3 reset_config sysresetreq +if {![using_hla]} { + # if srst is not fitted use SYSRESETREQ to + # perform a soft reset + cortex_m reset_config sysresetreq +} proc stm32l_enable_HSI {} { # Enable HSI as clock source @@ -79,3 +96,6 @@ $_TARGETNAME configure -event reset-init { stm32l_enable_HSI } +$_TARGETNAME configure -event reset-start { + adapter_khz 300 +}