X-Git-Url: https://git.gag.com/?a=blobdiff_plain;f=tcl%2Ftarget%2Fstm32f3x.cfg;h=ebec04f857ec12da94f4bfacc4e373a030893cd8;hb=e6505b04892ccacf75603c3d173616f5d92809e7;hp=f3ea40bad029abe5eb708a5a7695e76ea70bce9e;hpb=c4b8c74140bc03d376efe919d8b81231dc5a0700;p=fw%2Fopenocd

diff --git a/tcl/target/stm32f3x.cfg b/tcl/target/stm32f3x.cfg
index f3ea40bad..ebec04f85 100644
--- a/tcl/target/stm32f3x.cfg
+++ b/tcl/target/stm32f3x.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
 # script for stm32f3x family
 
 #
@@ -28,9 +30,9 @@ if { [info exists WORKAREASIZE] } {
 # bit more to be on the safe side. Perhaps superstition, but if are
 # running off a crystal, we can run closer to the limit. Note
 # that there can be a pretty wide band where things are more or less stable.
-adapter_khz 1000
+adapter speed 1000
 
-adapter_nsrst_delay 100
+adapter srst delay 100
 if {[using_jtag]} {
  jtag_ntrst_delay 100
 }
@@ -49,32 +51,14 @@ if { [info exists CPUTAPID] } {
 }
 
 swj_newdap $_CHIPNAME cpu -irlen 4 -ircapture 0x1 -irmask 0xf -expected-id $_CPUTAPID
-
-if { [info exists BSTAPID] } {
-   set _BSTAPID $BSTAPID
-} else {
-  # STM Document RM0316 rev 5 for STM32F302/303 B/C size
-  set _BSTAPID1 0x06422041
-  # STM Document RM0313 rev 3 for STM32F37x
-  set _BSTAPID2 0x06432041
-  #  STM Document RM364 rev 1 for STM32F334
-  set _BSTAPID3 0x06438041
-  #  STM Document RM316 rev 5 for STM32F303 6/8 size
-  #  STM Document RM365 rev 3 for STM32F302 6/8 size
-  #  STM Document RM366 rev 2 for STM32F301 6/8 size
-  set _BSTAPID4 0x06439041
-  #  STM Document RM016 rev 5 for STM32F303 D/E size
-  set _BSTAPID5 0x06446041
-}
+dap create $_CHIPNAME.dap -chain-position $_CHIPNAME.cpu
 
 if {[using_jtag]} {
- swj_newdap $_CHIPNAME bs -irlen 5 -expected-id $_BSTAPID1 \
- -expected-id $_BSTAPID2 -expected-id $_BSTAPID3 \
- -expected-id $_BSTAPID4 -expected-id $_BSTAPID5
+   jtag newtap $_CHIPNAME bs -irlen 5
 }
 
 set _TARGETNAME $_CHIPNAME.cpu
-target create $_TARGETNAME cortex_m -endian $_ENDIAN -chain-position $_TARGETNAME
+target create $_TARGETNAME cortex_m -endian $_ENDIAN -dap $_CHIPNAME.dap
 
 $_TARGETNAME configure -work-area-phys 0x20000000 -work-area-size $_WORKAREASIZE -work-area-backup 0
 
@@ -91,7 +75,7 @@ if {![using_hla]} {
 
 proc stm32f3x_default_reset_start {} {
 	# Reset clock is HSI (8 MHz)
-	adapter_khz 1000
+	adapter speed 1000
 }
 
 proc stm32f3x_default_examine_end {} {
@@ -111,7 +95,7 @@ proc stm32f3x_default_reset_init {} {
 	mmw 0x40021004 0x00000002 0 ;# RCC_CFGR |= SW[1]
 
 	# Boost JTAG frequency
-	adapter_khz 8000
+	adapter speed 8000
 }
 
 # Default hooks