X-Git-Url: https://git.gag.com/?a=blobdiff_plain;f=tcl%2Ftarget%2Fstm32f3x.cfg;h=e3f1a34ddccdd371d19752cf0d24ef6dae603951;hb=3359419e6a121e73361c74fcae08999aa85330da;hp=0c8919f1dc1ddf22822d3abbe8c66ecbf12cdb9c;hpb=d3445cd146f8efa6f5bdbd636f51e247ec7de766;p=fw%2Fopenocd

diff --git a/tcl/target/stm32f3x.cfg b/tcl/target/stm32f3x.cfg
index 0c8919f1d..e3f1a34dd 100644
--- a/tcl/target/stm32f3x.cfg
+++ b/tcl/target/stm32f3x.cfg
@@ -28,9 +28,9 @@ if { [info exists WORKAREASIZE] } {
 # bit more to be on the safe side. Perhaps superstition, but if are
 # running off a crystal, we can run closer to the limit. Note
 # that there can be a pretty wide band where things are more or less stable.
-adapter_khz 1000
+adapter speed 1000
 
-adapter_nsrst_delay 100
+adapter srst delay 100
 if {[using_jtag]} {
  jtag_ntrst_delay 100
 }
@@ -49,13 +49,14 @@ if { [info exists CPUTAPID] } {
 }
 
 swj_newdap $_CHIPNAME cpu -irlen 4 -ircapture 0x1 -irmask 0xf -expected-id $_CPUTAPID
+dap create $_CHIPNAME.dap -chain-position $_CHIPNAME.cpu
 
 if {[using_jtag]} {
    jtag newtap $_CHIPNAME bs -irlen 5
 }
 
 set _TARGETNAME $_CHIPNAME.cpu
-target create $_TARGETNAME cortex_m -endian $_ENDIAN -chain-position $_TARGETNAME
+target create $_TARGETNAME cortex_m -endian $_ENDIAN -dap $_CHIPNAME.dap
 
 $_TARGETNAME configure -work-area-phys 0x20000000 -work-area-size $_WORKAREASIZE -work-area-backup 0
 
@@ -72,7 +73,7 @@ if {![using_hla]} {
 
 proc stm32f3x_default_reset_start {} {
 	# Reset clock is HSI (8 MHz)
-	adapter_khz 1000
+	adapter speed 1000
 }
 
 proc stm32f3x_default_examine_end {} {
@@ -92,7 +93,7 @@ proc stm32f3x_default_reset_init {} {
 	mmw 0x40021004 0x00000002 0 ;# RCC_CFGR |= SW[1]
 
 	# Boost JTAG frequency
-	adapter_khz 8000
+	adapter speed 8000
 }
 
 # Default hooks