X-Git-Url: https://git.gag.com/?a=blobdiff_plain;f=tcl%2Ftarget%2Fstm32f2x.cfg;h=cfd6274e68acc2128b39cf5bed5b699f41e57810;hb=9959297f2012eae7b810bb7d1c3679fafbee0fae;hp=b8de38437ccf922da556428d949bc0d21d35805c;hpb=89f593d8cbd74eb1db5d6beb2e60e9844504db6e;p=fw%2Fopenocd diff --git a/tcl/target/stm32f2x.cfg b/tcl/target/stm32f2x.cfg index b8de38437..cfd6274e6 100644 --- a/tcl/target/stm32f2x.cfg +++ b/tcl/target/stm32f2x.cfg @@ -1,23 +1,23 @@ -# script for stm32f2xxx +# script for stm32f2x family if { [info exists CHIPNAME] } { - set _CHIPNAME $CHIPNAME + set _CHIPNAME $CHIPNAME } else { - set _CHIPNAME stm32f2xxx + set _CHIPNAME stm32f2x } if { [info exists ENDIAN] } { - set _ENDIAN $ENDIAN + set _ENDIAN $ENDIAN } else { - set _ENDIAN little + set _ENDIAN little } # Work-area is a space in RAM used for flash programming # By default use 64kB if { [info exists WORKAREASIZE] } { - set _WORKAREASIZE $WORKAREASIZE + set _WORKAREASIZE $WORKAREASIZE } else { - set _WORKAREASIZE 0x10000 + set _WORKAREASIZE 0x10000 } # JTAG speed should be <= F_CPU/6. F_CPU after reset is 8MHz, so use F_JTAG = 1MHz @@ -26,13 +26,13 @@ if { [info exists WORKAREASIZE] } { # bit more to be on the safe side. Perhaps superstition, but if are # running off a crystal, we can run closer to the limit. Note # that there can be a pretty wide band where things are more or less stable. -jtag_khz 1000 +adapter_khz 1000 -jtag_nsrst_delay 100 +adapter_nsrst_delay 100 jtag_ntrst_delay 100 #jtag scan chain -if { [info exists CPUTAPID ] } { +if { [info exists CPUTAPID] } { set _CPUTAPID $CPUTAPID } else { # See STM Document RM0033 @@ -41,7 +41,7 @@ if { [info exists CPUTAPID ] } { } jtag newtap $_CHIPNAME cpu -irlen 4 -ircapture 0x1 -irmask 0xf -expected-id $_CPUTAPID -if { [info exists BSTAPID ] } { +if { [info exists BSTAPID] } { set _BSTAPID $BSTAPID } else { # See STM Document RM0033 @@ -59,3 +59,6 @@ $_TARGETNAME configure -work-area-phys 0x20000000 -work-area-size $_WORKAREASIZE set _FLASHNAME $_CHIPNAME.flash flash bank $_FLASHNAME stm32f2x 0 0 0 0 $_TARGETNAME +# if srst is not fitted use SYSRESETREQ to +# perform a soft reset +cortex_m3 reset_config sysresetreq