X-Git-Url: https://git.gag.com/?a=blobdiff_plain;f=tcl%2Ftarget%2Fqualcomm_qca4531.cfg;h=be0c8fab370663fe16ff7802367d5408226a239b;hb=e6505b04892ccacf75603c3d173616f5d92809e7;hp=3d21578524981ee1f9c72b46efdb7896eff84d93;hpb=8e8b50f65dffd6908375cfd96e57820031bf6e2c;p=fw%2Fopenocd

diff --git a/tcl/target/qualcomm_qca4531.cfg b/tcl/target/qualcomm_qca4531.cfg
index 3d2157852..be0c8fab3 100644
--- a/tcl/target/qualcomm_qca4531.cfg
+++ b/tcl/target/qualcomm_qca4531.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
 # The QCA4531 is a two stream (2x2) 802.11b/g/n single-band programmable
 # Wi-Fi System-on-Chip (SoC) for the Internet of Things (IoT).
 #
@@ -38,12 +40,12 @@ reset_config none srst_pulls_trst
 # For SRST based variant we still need proper timings.
 # For ETH part the reset should be asserted at least for 10ms
 # Since there is no other information let's take 100ms to be sure.
-adapter_nsrst_assert_width 100
+adapter srst pulse_width 100
 
 # according to the SoC documentation it should take at least 5ms from
 # reset end till bootstrap end. In the practice we need 8ms to get JTAG back
 # to live.
-adapter_nsrst_delay 8
+adapter srst delay 8
 
 if { [info exists CHIPNAME] } {
 	set _CHIPNAME $_CHIPNAME