X-Git-Url: https://git.gag.com/?a=blobdiff_plain;f=tcl%2Ftarget%2Fomapl138.cfg;h=2d670b98a34168cda8457243d6ea6a6cb651b113;hb=ca52cfb2b34d684d10e9c91eeb2c6a66a1448b9f;hp=d3e472c6d8c5519eaf7b0b66345c71d22804052c;hpb=ca45e700b1c57caca2ef08e665e3c7e3e02ac8d3;p=fw%2Fopenocd

diff --git a/tcl/target/omapl138.cfg b/tcl/target/omapl138.cfg
index d3e472c6d..2d670b98a 100644
--- a/tcl/target/omapl138.cfg
+++ b/tcl/target/omapl138.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
 #
 # Texas Instruments DaVinci family: OMAPL138
 #
@@ -35,7 +37,7 @@ if { [info exists JRC_TAPID] } {
 } else {
    set _JRC_TAPID 0x0b7d102f
 }
-jtag newtap $_CHIPNAME jrc -irlen 6 -irmask 0x3f -expected-id $_JRC_TAPID
+jtag newtap $_CHIPNAME jrc -irlen 6 -irmask 0x3f -expected-id $_JRC_TAPID -ignore-version
 
 jtag configure $_CHIPNAME.jrc -event setup \
 	"jtag tapenable $_CHIPNAME.etb; jtag tapenable $_CHIPNAME.arm"
@@ -52,8 +54,8 @@ $_TARGETNAME configure -work-area-phys 0x80000000 -work-area-size 0x2000
 # be absolutely certain the JTAG clock will work with the worst-case
 # CLKIN = 20 MHz (best case: 30 MHz) even when no bootloader turns
 # on the PLL and starts using it.  OK to speed up after clock setup.
-jtag_rclk 1500
-$_TARGETNAME configure -event "reset-start" { jtag_rclk 1500 }
+adapter speed 1500
+$_TARGETNAME configure -event "reset-start" { adapter speed 1500 }
 
 arm7_9 fast_memory_access enable
 arm7_9 dcc_downloads enable