X-Git-Url: https://git.gag.com/?a=blobdiff_plain;f=tcl%2Ftarget%2Fomap3530.cfg;h=dcf7c513958617cbabfd3859abeddfce218c3332;hb=f583f338b086ed3a1cd471e1fd8ef99589a64dae;hp=0e20852ca12d499bbd9b851d6b8078e9a75fef0f;hpb=d9ba56c295f057e716519a798bf9cdb4898c24f4;p=fw%2Fopenocd

diff --git a/tcl/target/omap3530.cfg b/tcl/target/omap3530.cfg
index 0e20852ca..dcf7c5139 100644
--- a/tcl/target/omap3530.cfg
+++ b/tcl/target/omap3530.cfg
@@ -20,9 +20,9 @@ if { [info exists DAP_TAPID] } {
 } else {
    set _DAP_TAPID 0x0b6d602f
 }
-jtag newtap $_CHIPNAME dap -irlen 4 -ircapture 0x1 -irmask 0xf \
+jtag newtap $_CHIPNAME cpu -irlen 4 -ircapture 0x1 -irmask 0xf \
 	-expected-id $_DAP_TAPID -disable
-jtag configure $_CHIPNAME.dap -event tap-enable \
+jtag configure $_CHIPNAME.cpu -event tap-enable \
 	"icepick_c_tapenable $_CHIPNAME.jrc 3"
 
 # Primary TAP: ICEpick-C (JTAG route controller) and boundary scan
@@ -36,7 +36,8 @@ jtag newtap $_CHIPNAME jrc -irlen 6 -ircapture 0x1 -irmask 0x3f \
 
 # GDB target: Cortex-A8, using DAP
 set _TARGETNAME $_CHIPNAME.cpu
-target create $_TARGETNAME cortex_a -chain-position $_CHIPNAME.dap
+dap create $_CHIPNAME.dap -chain-position $_CHIPNAME.cpu
+target create $_TARGETNAME cortex_a -dap $_CHIPNAME.dap
 
 # SRAM: 64K at 0x4020.0000; use the first 16K
 $_TARGETNAME configure -work-area-phys 0x40200000 -work-area-size 0x4000
@@ -53,7 +54,7 @@ jtag configure $_CHIPNAME.jrc -event post-reset "runtest 100"
 jtag configure $_CHIPNAME.jrc -event setup "jtag tapenable $_CHIPNAME.dap"
 
 proc omap3_dbginit {target} {
-     # General Cortex A8 debug initialisation
+     # General Cortex-A8 debug initialisation
      cortex_a dbginit
      # Enable DBGU signal for OMAP353x
      $target mww phys 0x5401d030 0x00002000
@@ -62,8 +63,8 @@ proc omap3_dbginit {target} {
 # be absolutely certain the JTAG clock will work with the worst-case
 # 16.8MHz/2 = 8.4MHz core clock, even before a bootloader kicks in.
 # OK to speed up *after* PLL and clock tree setup.
-jtag_rclk 1000
-$_TARGETNAME configure -event "reset-start" { jtag_rclk 1000 }
+adapter speed 1000
+$_TARGETNAME configure -event "reset-start" { adapter speed 1000 }
 
 # Assume SRST is unavailable (e.g. TI-14 JTAG), so we must assert reset
 # ourselves using PRM_RSTCTRL.  RST_GS (2) is a warm reset, like ICEpick