X-Git-Url: https://git.gag.com/?a=blobdiff_plain;f=tcl%2Ftarget%2Fimx53.cfg;h=84a85babbd900508d1881c4e119a9c0ab4f57774;hb=385eedfc6f0b82c5d6715c740ee40bdce983ef04;hp=b242fd6d0cc54c0feaa86206ae6e06a4a0977213;hpb=041953f3b1e615ed898068a659d429e20f7a4007;p=fw%2Fopenocd

diff --git a/tcl/target/imx53.cfg b/tcl/target/imx53.cfg
index b242fd6d0..84a85babb 100644
--- a/tcl/target/imx53.cfg
+++ b/tcl/target/imx53.cfg
@@ -1,51 +1,45 @@
 # Freescale i.MX53
 
 if { [info exists CHIPNAME] } {
-   set  _CHIPNAME $CHIPNAME
+   set _CHIPNAME $CHIPNAME
 } else {
-   set  _CHIPNAME imx53
+   set _CHIPNAME imx53
 }
 
 # CoreSight Debug Access Port
-if { [info exists DAP_TAPID ] } {
+if { [info exists DAP_TAPID] } {
    set _DAP_TAPID $DAP_TAPID
 } else {
    set _DAP_TAPID 0x1ba00477
 }
 
-jtag newtap $_CHIPNAME DAP -irlen 4 -ircapture 0x1 -irmask 0xf \
+jtag newtap $_CHIPNAME cpu -irlen 4 -ircapture 0x1 -irmask 0xf \
         -expected-id $_DAP_TAPID
 
 # SDMA / no IDCODE
-jtag newtap $_CHIPNAME SDMA -irlen 4 -ircapture 0x0 -irmask 0xf
+jtag newtap $_CHIPNAME sdma -irlen 4 -ircapture 0x0 -irmask 0xf
 
 # SJC
-if { [info exists SJC_TAPID ] } {
+if { [info exists SJC_TAPID] } {
    set _SJC_TAPID SJC_TAPID
 } else {
    set _SJC_TAPID 0x0190d01d
 }
 
-jtag newtap $_CHIPNAME SJC -irlen 5 -ircapture 0x1 -irmask 0x1f \
+jtag newtap $_CHIPNAME sjc -irlen 5 -ircapture 0x1 -irmask 0x1f \
         -expected-id $_SJC_TAPID -ignore-version
 
-# GDB target:  Cortex-A8, using DAP
+# GDB target: Cortex-A8, using DAP
 set _TARGETNAME $_CHIPNAME.cpu
-target create $_TARGETNAME cortex_a8 -chain-position $_CHIPNAME.DAP
+dap create $_CHIPNAME.dap -chain-position $_CHIPNAME.cpu
+target create $_TARGETNAME cortex_a -dap $_CHIPNAME.dap
 
 # some TCK tycles are required to activate the DEBUG power domain
-jtag configure $_CHIPNAME.SJC -event post-reset "runtest 100"
-
-# have the DAP "always" be active
-jtag configure $_CHIPNAME.SJC -event setup "jtag tapenable $_CHIPNAME.DAP"
+jtag configure $_CHIPNAME.sjc -event post-reset "runtest 100"
 
 proc imx53_dbginit {target} {
-     # General Cortex A8 debug initialisation
-     cortex_a8 dbginit
+     # General Cortex-A8 debug initialisation
+     cortex_a dbginit
 }
 
-# Slow speed to be sure it will work
-jtag_rclk 1000
-$_TARGETNAME configure -event "reset-start" { jtag_rclk 1000 }
-
 $_TARGETNAME configure -event reset-assert-post "imx53_dbginit $_TARGETNAME"