X-Git-Url: https://git.gag.com/?a=blobdiff_plain;f=tcl%2Ftarget%2Ficepick.cfg;h=cc824ad0e951d45e5fe3f4135aeb78e5dbb2e230;hb=e5f515f990cc345fd3089a5520f39d5a128329bd;hp=13a6a5106b8a68930ef1a7c4dad73670c912e3b8;hpb=3201a104fe198fc40f515a99ea56621f90302e2b;p=fw%2Fopenocd diff --git a/tcl/target/icepick.cfg b/tcl/target/icepick.cfg index 13a6a5106..cc824ad0e 100644 --- a/tcl/target/icepick.cfg +++ b/tcl/target/icepick.cfg @@ -54,8 +54,8 @@ proc icepick_c_disconnect {jrc} { proc icepick_c_router {jrc rw block register payload} { set new_dr_value \ - [expr ( ($rw & 0x1) << 31) | ( ($block & 0x7) << 28) | \ - ( ($register & 0xF) << 24) | ( $payload & 0xFFFFFF ) ] + [expr { ( ($rw & 0x1) << 31) | ( ($block & 0x7) << 28) | \ + ( ($register & 0xF) << 24) | ( $payload & 0xFFFFFF ) } ] # echo "\tNew router value:\t0x[format %x $new_dr_value]" @@ -63,7 +63,8 @@ proc icepick_c_router {jrc rw block register payload} { irscan $jrc [CONST IR_ROUTER] -endstate IRPAUSE # ROUTER instructions are 32 bits wide - set old_dr_value [drscan $jrc 32 $new_dr_value -endstate DRPAUSE] + set old_dr_value 0x[drscan $jrc 32 $new_dr_value -endstate DRPAUSE] +# echo "\tOld router value:\t0x[format %x $old_dr_value]" } # Configure the icepick control register @@ -74,9 +75,22 @@ proc icepick_c_setup {jrc} { } # jrc == TAP name for the ICEpick -# port == a port number, 0..15 +# port == a port number, 0..15 for debug tap, 16..31 for test tap proc icepick_c_tapenable {jrc port} { + if { ($port >= 0) && ($port < 16) } { + # Debug tap" + set tap $port + set block 0x2 + } elseif { $port < 32 } { + # Test tap + set tap [expr {$port - 16}] + set block 0x1 + } else { + echo "ERROR: Invalid ICEPick C port number: $port" + return + } + # First CONNECT to the ICEPick # echo "Connecting to ICEPick" icepick_c_connect $jrc @@ -89,39 +103,45 @@ proc icepick_c_tapenable {jrc port} { # And never to enter RESET, which will disable the TAPs. # first enable power and clock for TAP - icepick_c_router $jrc 1 0x2 $port 0x100048 + icepick_c_router $jrc 1 $block $tap 0x110048 # TRM states that the register should be read back here, skipped for now # enable debug "default" mode - icepick_c_router $jrc 1 0x2 $port 0x102048 + icepick_c_router $jrc 1 $block $tap 0x112048 # TRM states that debug enable and debug mode should be read back and # confirmed - skipped for now # Finally select the tap - icepick_c_router $jrc 1 0x2 $port 0x102148 + icepick_c_router $jrc 1 $block $tap 0x112148 # Enter the bypass state irscan $jrc [CONST IR_BYPASS] -endstate RUN/IDLE runtest 10 } +# jrc == TAP name for the ICEpick +# coreid== core id number 0..15 (not same as port number!) +proc icepick_d_set_core_control {jrc coreid value } { + icepick_c_router $jrc 1 0x6 $coreid $value +} + # jrc == TAP name for the ICEpick # port == a port number, 0..15 # Follow the sequence described in # http://processors.wiki.ti.com/images/f/f6/Router_Scan_Sequence-ICEpick-D.pdf -proc icepick_d_tapenable {jrc port} { +proc icepick_d_tapenable {jrc port coreid { value 0x2008 } } { + # First CONNECT to the ICEPick icepick_c_connect $jrc + icepick_c_setup $jrc # Select the port - irscan $jrc [CONST IR_ROUTER] -endstate IRPAUSE - drscan $jrc 32 [expr 0xa0002108 + ($port << 24)] -endstate DRPAUSE + icepick_c_router $jrc 1 0x2 $port 0x2108 - # Set 4 bit core ID to the Cortex-A - irscan $jrc [CONST IR_ROUTER] -endstate IRPAUSE - drscan $jrc 32 0xe0002008 -endstate DRPAUSE + # Set icepick core control for $coreid + icepick_d_set_core_control $jrc $coreid $value # Enter the bypass state irscan $jrc [CONST IF_BYPASS] -endstate RUN/IDLE @@ -134,4 +154,3 @@ proc icepick_c_wreset {jrc} { # send a router write, block is 0, register is 1, value is 0x2100 icepick_c_router $jrc 1 0x0 0x1 0x002101 } -