X-Git-Url: https://git.gag.com/?a=blobdiff_plain;f=tcl%2Ftarget%2Fesp32s2.cfg;h=e478a6d39d52950442ef3af76ca0bf62ccb61b03;hb=bea4d6590356f4a9ef0bcb6b270943e565852f0e;hp=23ada5e9b0cc180f7eb84d2cc4c123fbb1683007;hpb=7dc4be3157d666ef05905151b7b4d0f05778b08a;p=fw%2Fopenocd

diff --git a/tcl/target/esp32s2.cfg b/tcl/target/esp32s2.cfg
index 23ada5e9b..e478a6d39 100644
--- a/tcl/target/esp32s2.cfg
+++ b/tcl/target/esp32s2.cfg
@@ -7,6 +7,8 @@ set CPU_MAX_ADDRESS 0xFFFFFFFF
 source [find bitsbytes.tcl]
 source [find memory.tcl]
 source [find mmr_helpers.tcl]
+# Source the ESP common configuration file
+source [find target/esp_common.cfg]
 
 if { [info exists CHIPNAME] } {
 	set _CHIPNAME $CHIPNAME
@@ -60,6 +62,17 @@ $_TARGETNAME configure -event gdb-attach {
 
 xtensa maskisr on
 
+$_TARGETNAME configure -event examine-end {
+	# Need to enable to set 'semihosting_basedir'
+	arm semihosting enable
+	arm semihosting_resexit enable
+	if { [info exists _SEMIHOST_BASEDIR] } {
+		if { $_SEMIHOST_BASEDIR != "" } {
+			arm semihosting_basedir $_SEMIHOST_BASEDIR
+		}
+	}
+}
+
 $_TARGETNAME configure -event reset-assert-post { soft_reset_halt }
 
 gdb_breakpoint_override hard