X-Git-Url: https://git.gag.com/?a=blobdiff_plain;f=tcl%2Ftarget%2Fem357.cfg;h=ddefa28e0132b27379c122de755749bbe3d558fc;hb=e6505b04892ccacf75603c3d173616f5d92809e7;hp=f44b2985aa6a745447aee8c9d278242d3ecd9ac6;hpb=18d6c0b02bf5e1318d5f5484b5ba68b476a418f0;p=fw%2Fopenocd

diff --git a/tcl/target/em357.cfg b/tcl/target/em357.cfg
index f44b2985a..ddefa28e0 100644
--- a/tcl/target/em357.cfg
+++ b/tcl/target/em357.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
 #
 # Target configuration for the Silicon Labs EM357 chips
 #
@@ -34,7 +36,7 @@ if { [info exists CPUTAPID] } {
 if { [info exists BSTAPID] } {
    set _BSTAPID $BSTAPID
 } else {
-  set _BSTAPID 0x069aa62b
+  set _BSTAPID 0x069a962b
 }
 
 if { [info exists CHIPNAME] } {
@@ -50,12 +52,13 @@ if { [info exists FLASHSIZE] } {
 }
 
 swj_newdap $_CHIPNAME cpu -irlen 4 -expected-id $_CPUTAPID
+dap create $_CHIPNAME.dap -chain-position $_CHIPNAME.cpu
 if { [using_jtag] } {
-    swj_newdap $_CHIPNAME bs -irlen 4 -expected-id $_BSTAPID -ircapture 0xe -irmask 0xf
+    jtag newtap $_CHIPNAME bs -irlen 4 -expected-id $_BSTAPID -ircapture 0xe -irmask 0xf
 }
 
 set _TARGETNAME $_CHIPNAME.cpu
-target create $_TARGETNAME cortex_m -endian little -chain-position $_TARGETNAME
+target create $_TARGETNAME cortex_m -endian little -dap $_CHIPNAME.dap
 
 $_TARGETNAME configure -work-area-phys 0x20000000 -work-area-size $_WORKAREASIZE -work-area-backup 0
 
@@ -63,5 +66,14 @@ set _FLASHNAME $_CHIPNAME.flash
 flash bank $_FLASHNAME em357 0x08000000 $_FLASHSIZE 0 0 $_TARGETNAME
 
 if { ![using_hla]} {
-    cortex_m reset_config sysresetreq
+# according to errata, we need to use vectreset rather than sysresetreq to avoid lockup
+# There is a bug in the chip, which means that when using external debuggers the chip
+# may lock up in certain CPU clock modes. Affected modes are operating the CPU at
+# 24MHz derived from the 24MHz crystal, or 12MHz derived from the high frequency RC
+# oscillator. If an external debugger tool asserts SYSRESETREQ, the chip will lock up and
+# require a pin reset or power cycle.
+#
+# for details, refer to:
+# http://www.silabs.com/Support%20Documents/TechnicalDocs/EM35x-Errata.pdf
+    cortex_m reset_config vectreset
 }