X-Git-Url: https://git.gag.com/?a=blobdiff_plain;f=tcl%2Ftarget%2Fatheros_ar9331.cfg;h=931ac10356939886d24e2a0a645b3654735fe854;hb=e6505b04892ccacf75603c3d173616f5d92809e7;hp=bea37ed3c78587f13520e88b0ee290ccc93ada72;hpb=bebdbe8b73b8d7cb2837687c0d38396fee0142fd;p=fw%2Fopenocd

diff --git a/tcl/target/atheros_ar9331.cfg b/tcl/target/atheros_ar9331.cfg
index bea37ed3c..931ac1035 100644
--- a/tcl/target/atheros_ar9331.cfg
+++ b/tcl/target/atheros_ar9331.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
 # The Atheros AR9331 is a highly integrated and cost effective
 # IEEE 802.11n 1x1 2.4 GHz System- on-a-Chip (SoC) for wireless
 # local area network (WLAN) AP and router platforms.
@@ -41,12 +43,12 @@ reset_config none srst_pulls_trst
 # For SRST based variant we still need proper timings.
 # For ETH part the reset should be asserted at least for 10ms
 # Since there is no other information let's take 100ms to be sure.
-adapter_nsrst_assert_width 100
+adapter srst pulse_width 100
 
 # according to the SoC documentation it should take at least 5ms from
 # reset end till bootstrap end. In the practice we need 8ms to get JTAG back
 # to live.
-adapter_nsrst_delay 8
+adapter srst delay 8
 
 if { [info exists CHIPNAME] } {
 	set _CHIPNAME $_CHIPNAME