X-Git-Url: https://git.gag.com/?a=blobdiff_plain;f=tcl%2Ftarget%2Fat91samdXX.cfg;h=5132109ba8d7b570f951d957855aa935250e2835;hb=e6505b04892ccacf75603c3d173616f5d92809e7;hp=93a95c8eb9bc6d3817a21ad65d0fd0f83daedcad;hpb=390c9aca1f9400d956020b3d1657237bcc1ffe68;p=fw%2Fopenocd

diff --git a/tcl/target/at91samdXX.cfg b/tcl/target/at91samdXX.cfg
index 93a95c8eb..5132109ba 100644
--- a/tcl/target/at91samdXX.cfg
+++ b/tcl/target/at91samdXX.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
 #
 # script for Atmel SAMD, SAMR, SAML or SAMC, a Cortex-M0 chip
 #
@@ -34,9 +36,10 @@ if { [info exists CPUTAPID] } {
 }
 
 swj_newdap $_CHIPNAME cpu -irlen 4 -expected-id $_CPUTAPID
+dap create $_CHIPNAME.dap -chain-position $_CHIPNAME.cpu
 
 set _TARGETNAME $_CHIPNAME.cpu
-target create $_TARGETNAME cortex_m -endian $_ENDIAN -chain-position $_TARGETNAME
+target create $_TARGETNAME cortex_m -endian $_ENDIAN -dap $_CHIPNAME.dap
 
 $_TARGETNAME configure -work-area-phys 0x20000000 -work-area-size $_WORKAREASIZE -work-area-backup 0
 
@@ -65,12 +68,12 @@ reset_config srst_gates_jtag
 # This limit is most probably imposed by incorrectly handled SWD WAIT
 # on some SWD adapters.
 
-adapter_khz 400
+adapter speed 400
 
 # Atmel's EDBG (on-board cmsis-dap adapter of Xplained kits) works
 # without problem at maximal clock speed. Atmel recommends
 # adapter speed less than 10 * CPU clock.
-# adapter_khz 5000
+# adapter speed 5000
 
 if {![using_hla]} {
    # if srst is not fitted use SYSRESETREQ to