X-Git-Url: https://git.gag.com/?a=blobdiff_plain;f=tcl%2Ftarget%2F1986%D0%B2%D0%B51%D1%82.cfg;h=a3172ccab172b662a98e8c4ab59898a88f03cae8;hb=e6505b04892ccacf75603c3d173616f5d92809e7;hp=98d5103185cdbf907a8f6ef9409c18c67604fe66;hpb=871b34cf2cd667e1001729ce435d1fb0013762ff;p=fw%2Fopenocd

diff --git "a/tcl/target/1986\320\262\320\2651\321\202.cfg" "b/tcl/target/1986\320\262\320\2651\321\202.cfg"
index 98d510318..a3172ccab 100644
--- "a/tcl/target/1986\320\262\320\2651\321\202.cfg"
+++ "b/tcl/target/1986\320\262\320\2651\321\202.cfg"
@@ -1,6 +1,10 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
 # 1986ВЕ1Т
 # http://milandr.ru/index.php?mact=Products,cntnt01,details,0&cntnt01productid=236&cntnt01returnid=68
 
+source [find target/swj-dp.tcl]
+
 if { [info exists CHIPNAME] } {
    set _CHIPNAME $CHIPNAME
 } else {
@@ -20,22 +24,22 @@ if { [info exists WORKAREASIZE] } {
    set _WORKAREASIZE 0x4000
 }
 
-# JTAG speed should be <= F_CPU/6. F_CPU after reset is 8MHz, so use F_JTAG = 1MHz
-adapter_khz 1000
-
-adapter_nsrst_delay 100
-jtag_ntrst_delay 100
-
 #jtag scan chain
 if { [info exists CPUTAPID] } {
    set _CPUTAPID $CPUTAPID
 } else {
-   set _CPUTAPID 0x4ba00477
+   if { [using_jtag] } {
+      set _CPUTAPID 0x4ba00477
+   } {
+      # SWD IDCODE
+      set _CPUTAPID 0x2ba01477
+   }
 }
-jtag newtap $_CHIPNAME cpu -irlen 4 -ircapture 0x1 -irmask 0xf -expected-id $_CPUTAPID
+swj_newdap $_CHIPNAME cpu -irlen 4 -ircapture 0x1 -irmask 0xf -expected-id $_CPUTAPID
+dap create $_CHIPNAME.dap -chain-position $_CHIPNAME.cpu
 
 set _TARGETNAME $_CHIPNAME.cpu
-target create $_TARGETNAME cortex_m -endian $_ENDIAN -chain-position $_TARGETNAME
+target create $_TARGETNAME cortex_m -endian $_ENDIAN -dap $_CHIPNAME.dap
 
 # use AHB-Lite SRAM for work area
 $_TARGETNAME configure -work-area-phys 0x20100000 -work-area-size $_WORKAREASIZE -work-area-backup 0
@@ -47,6 +51,16 @@ if { [info exists IMEMORY] && [string equal $IMEMORY true] } {
    flash bank $_CHIPNAME.flash mdr 0x00000000 0x20000 0 0 $_TARGETNAME 0 32 4
 }
 
-# if srst is not fitted use SYSRESETREQ to
-# perform a soft reset
-cortex_m reset_config sysresetreq
+# JTAG speed should be <= F_CPU/6. F_CPU after reset is 8MHz, so use F_JTAG = 1MHz
+adapter speed 1000
+
+adapter srst delay 100
+if {[using_jtag]} {
+   jtag_ntrst_delay 100
+}
+
+if {![using_hla]} {
+   # if srst is not fitted use SYSRESETREQ to
+   # perform a soft reset
+   cortex_m reset_config sysresetreq
+}