X-Git-Url: https://git.gag.com/?a=blobdiff_plain;f=tcl%2Fmemory.tcl;h=b11174995407ddc7dc834a04ba2a60cd0e89146b;hb=ce217538bc2b9c5ef6dc760b0b03d54602ed3be6;hp=c1e012d8d39a638e0fc29cfb0d25d25b3be1b5fa;hpb=f5657aa76e795e4ed5b13a9f5df943181a123e49;p=fw%2Fopenocd

diff --git a/tcl/memory.tcl b/tcl/memory.tcl
index c1e012d8d..b11174995 100644
--- a/tcl/memory.tcl
+++ b/tcl/memory.tcl
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
 # MEMORY
 #
 # All Memory regions have two components.
@@ -58,7 +60,7 @@ set ACCESS_WIDTH_ANY  [expr {$ACCESS_WIDTH_8 + $ACCESS_WIDTH_16 + $ACCESS_WIDTH_
 set UNKNOWN(0,ACCESS_WIDTH) $ACCESS_WIDTH_NONE
 
 proc iswithin { ADDRESS BASE LEN } {
-    return [expr ((($ADDRESS - $BASE) >= 0) && (($BASE + $LEN - $ADDRESS) > 0))]
+    return [expr {(($ADDRESS - $BASE) >= 0) && (($BASE + $LEN - $ADDRESS) > 0)}]
 }
 
 proc address_info { ADDRESS } {
@@ -79,108 +81,96 @@ proc address_info { ADDRESS } {
 }
 
 proc memread32 {ADDR} {
-    set foo(0) 0
-    if ![ catch { mem2array foo 32 $ADDR 1  } msg ] {
-	return $foo(0)
+    if ![ catch { set foo [read_memory $ADDR 32 1] } msg ] {
+	return $foo
     } else {
 	error "memread32: $msg"
     }
 }
 
 proc memread16 {ADDR} {
-    set foo(0) 0
-    if ![ catch { mem2array foo 16 $ADDR 1  } msg ] {
-	return $foo(0)
+    if ![ catch { set foo [read_memory $ADDR 16 1] } msg ] {
+	return $foo
     } else {
 	error "memread16: $msg"
     }
 }
 
 proc memread8 {ADDR} {
-    set foo(0) 0
-    if ![ catch { mem2array foo 8 $ADDR 1  } msg ] {
-	return $foo(0)
+    if ![ catch { set foo [read_memory $ADDR 8 1] } msg ] {
+	return $foo
     } else {
 	error "memread8: $msg"
     }
 }
 
 proc memwrite32 {ADDR DATA} {
-    set foo(0) $DATA
-    if ![ catch { array2mem foo 32 $ADDR 1  } msg ] {
-	return $foo(0)
+    if ![ catch { write_memory $ADDR 32 $DATA } msg ] {
+	return $DATA
     } else {
 	error "memwrite32: $msg"
     }
 }
 
 proc memwrite16 {ADDR DATA} {
-    set foo(0) $DATA
-    if ![ catch { array2mem foo 16 $ADDR 1  } msg ] {
-	return $foo(0)
+    if ![ catch { write_memory $ADDR 16 $DATA } msg ] {
+	return $DATA
     } else {
 	error "memwrite16: $msg"
     }
 }
 
 proc memwrite8 {ADDR DATA} {
-    set foo(0) $DATA
-    if ![ catch { array2mem foo 8 $ADDR 1  } msg ] {
-	return $foo(0)
+    if ![ catch { write_memory $ADDR 8 $DATA } msg ] {
+	return $DATA
     } else {
 	error "memwrite8: $msg"
     }
 }
 
 proc memread32_phys {ADDR} {
-    set foo(0) 0
-    if ![ catch { mem2array foo 32 $ADDR 1 phys } msg ] {
-	return $foo(0)
+    if ![ catch { set foo [read_memory $ADDR 32 1 phys] } msg ] {
+	return $foo
     } else {
 	error "memread32: $msg"
     }
 }
 
 proc memread16_phys {ADDR} {
-    set foo(0) 0
-    if ![ catch { mem2array foo 16 $ADDR 1 phys } msg ] {
-	return $foo(0)
+    if ![ catch { set foo [read_memory $ADDR 16 1 phys] } msg ] {
+	return $foo
     } else {
 	error "memread16: $msg"
     }
 }
 
 proc memread8_phys {ADDR} {
-    set foo(0) 0
-    if ![ catch { mem2array foo 8 $ADDR 1 phys } msg ] {
-	return $foo(0)
+    if ![ catch { set foo [read_memory $ADDR 8 1 phys] } msg ] {
+	return $foo
     } else {
 	error "memread8: $msg"
     }
 }
 
 proc memwrite32_phys {ADDR DATA} {
-    set foo(0) $DATA
-    if ![ catch { array2mem foo 32 $ADDR 1 phys } msg ] {
-	return $foo(0)
+    if ![ catch { write_memory $ADDR 32 $DATA phys } msg ] {
+	return $DATA
     } else {
 	error "memwrite32: $msg"
     }
 }
 
 proc memwrite16_phys {ADDR DATA} {
-    set foo(0) $DATA
-    if ![ catch { array2mem foo 16 $ADDR 1 phys } msg ] {
-	return $foo(0)
+    if ![ catch { write_memory $ADDR 16 $DATA phys } msg ] {
+	return $DATA
     } else {
 	error "memwrite16: $msg"
     }
 }
 
 proc memwrite8_phys {ADDR DATA} {
-    set foo(0) $DATA
-    if ![ catch { array2mem foo 8 $ADDR 1 phys } msg ] {
-	return $foo(0)
+    if ![ catch { write_memory $ADDR 8 $DATA phys } msg ] {
+	return $DATA
     } else {
 	error "memwrite8: $msg"
     }