X-Git-Url: https://git.gag.com/?a=blobdiff_plain;f=tcl%2Ffpga%2Faltera-10m50.cfg;h=d5af710592cae21a3ae3947c4bce9e7ee948a481;hb=36c3e0719d580b37b24a264fe6d0bf184531ccfc;hp=9d00daa832bdca57d51d686bc02c57e629556b3a;hpb=c1b8824d1936bd13a3edc11784e3f872ca3255db;p=fw%2Fopenocd

diff --git a/tcl/fpga/altera-10m50.cfg b/tcl/fpga/altera-10m50.cfg
index 9d00daa83..d5af71059 100644
--- a/tcl/fpga/altera-10m50.cfg
+++ b/tcl/fpga/altera-10m50.cfg
@@ -1,6 +1,22 @@
-# Altera MAX10 10M50SAE144C8GES FPGA
 # see MAX 10 FPGA Device Architecture
 # Table 3-1: IDCODE Information for MAX 10 Devices
-# Version     Part Number             Manuf. ID        LSB
-# 0000        0011 0001 1000 0101     000 0110 1110    1
-jtag newtap 10m50 tap -expected-id 0x031850dd -irlen 10
+# Intel MAX 10M02 0x31810dd
+# Intel MAX 10M04 0x318a0dd
+# Intel MAX 10M08 0x31820dd
+# Intel MAX 10M16 0x31830dd
+# Intel MAX 10M25 0x31840dd
+# Intel MAX 10M40 0x318d0dd
+# Intel MAX 10M50 0x31850dd
+# Intel MAX 10M02 0x31010dd
+# Intel MAX 10M04 0x310a0dd
+# Intel MAX 10M08 0x31020dd
+# Intel MAX 10M16 0x31030dd
+# Intel MAX 10M25 0x31040dd
+# Intel MAX 10M40 0x310d0dd
+# Intel MAX 10M50 0x31050dd
+
+jtag newtap 10m50 tap -irlen 10 -expected-id 0x31810dd -expected-id 0x318a0dd \
+	-expected-id 0x31820dd -expected-id 0x31830dd -expected-id 0x31840dd \
+	-expected-id 0x318d0dd -expected-id 0x31850dd -expected-id 0x31010dd \
+	-expected-id 0x310a0dd -expected-id 0x31020dd -expected-id 0x31030dd \
+	-expected-id 0x31040dd -expected-id 0x310d0dd -expected-id 0x31050dd