X-Git-Url: https://git.gag.com/?a=blobdiff_plain;f=tcl%2Fboard%2Fstm3220g_eval_stlink.cfg;h=d5296720c2912f08093779833f33a236d20d39b0;hb=4157732bd84c4e9e4b55357e1dc9a96078a35ee1;hp=6ac3751f1de054c5489b50e0a848bf6748f151de;hpb=067ac78b61ebd90523f9750ec7bcd4b67263b435;p=fw%2Fopenocd

diff --git a/tcl/board/stm3220g_eval_stlink.cfg b/tcl/board/stm3220g_eval_stlink.cfg
index 6ac3751f1..d5296720c 100644
--- a/tcl/board/stm3220g_eval_stlink.cfg
+++ b/tcl/board/stm3220g_eval_stlink.cfg
@@ -1,10 +1,14 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
 # STM3220G-EVAL: This is an STM32F2 eval board with a single STM32F207IGH6
 # (128KB) chip.
 # http://www.st.com/internet/evalboard/product/250374.jsp
 #
 # This is for using the onboard STLINK/V2
 
-source [find interface/stlink-v2.cfg]
+source [find interface/stlink.cfg]
+
+transport select hla_swd
 
 # increase working area to 128KB
 set WORKAREASIZE 0x20000
@@ -12,4 +16,6 @@ set WORKAREASIZE 0x20000
 # chip name
 set CHIPNAME STM32F207IGH6
 
-source [find target/stm32f2x_stlink.cfg]
+source [find target/stm32f2x.cfg]
+
+reset_config srst_only