X-Git-Url: https://git.gag.com/?a=blobdiff_plain;f=tcl%2Fboard%2Fstm3220g_eval_stlink.cfg;h=b58e42fe5d85ed30490f51056330a74daa138c18;hb=bd4bd54b60b3297b746d3d5379f25d54846ce517;hp=578a0e8a709abb78ecd139793f8fe599f6867e44;hpb=caeb05720595287e9a9865ff5f9e764c92be152d;p=fw%2Fopenocd

diff --git a/tcl/board/stm3220g_eval_stlink.cfg b/tcl/board/stm3220g_eval_stlink.cfg
index 578a0e8a7..b58e42fe5 100644
--- a/tcl/board/stm3220g_eval_stlink.cfg
+++ b/tcl/board/stm3220g_eval_stlink.cfg
@@ -4,7 +4,9 @@
 #
 # This is for using the onboard STLINK/V2
 
-source [find interface/stlink-v2.cfg]
+source [find interface/stlink.cfg]
+
+transport select hla_swd
 
 # increase working area to 128KB
 set WORKAREASIZE 0x20000
@@ -12,7 +14,6 @@ set WORKAREASIZE 0x20000
 # chip name
 set CHIPNAME STM32F207IGH6
 
-source [find target/stm32f2x_stlink.cfg]
+source [find target/stm32f2x.cfg]
 
-# use hardware reset, connect under reset
-reset_config srst_only srst_nogate
+reset_config srst_only