X-Git-Url: https://git.gag.com/?a=blobdiff_plain;f=tcl%2Fboard%2Fnumato_mimas_a7.cfg;h=82d6a561b22058e7069bc673cbd337d3eda50921;hb=4157732bd84c4e9e4b55357e1dc9a96078a35ee1;hp=a538872d1e0f05ffa889fbb4da2156199ca8aafb;hpb=2aa2ed1d8a3c489b0b7c1590e91f9989f2c42fb6;p=fw%2Fopenocd

diff --git a/tcl/board/numato_mimas_a7.cfg b/tcl/board/numato_mimas_a7.cfg
index a538872d1..82d6a561b 100644
--- a/tcl/board/numato_mimas_a7.cfg
+++ b/tcl/board/numato_mimas_a7.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
 #
 # Numato Mimas A7 - Artix 7 FPGA Board
 #
@@ -8,13 +10,13 @@
 #       Therefore, prefer external power supply.
 
 adapter driver ftdi
-ftdi_device_desc "Mimas Artix 7 FPGA Module"
-ftdi_vid_pid 0x2a19 0x1009
+ftdi device_desc "Mimas Artix 7 FPGA Module"
+ftdi vid_pid 0x2a19 0x1009
 
 # channel 0 is for custom purpose by users (like uart, fifo etc)
 # channel 1 is reserved for JTAG (by-default) or SPI (possible via changing solder jumpers)
-ftdi_channel 1
-ftdi_tdo_sample_edge falling
+ftdi channel 1
+ftdi tdo_sample_edge falling
 
 
 # FTDI Pin Layout
@@ -28,9 +30,9 @@ ftdi_tdo_sample_edge falling
 # OE_N is JTAG buffer output enable signal (active-low)
 # PROG_B is not used, so left as input to FTDI.
 #
-ftdi_layout_init 0x0008 0x004b
+ftdi layout_init 0x0008 0x004b
 reset_config none
-adapter_khz 30000
+adapter speed 30000
 
 source [find cpld/xilinx-xc7.cfg]
 source [find cpld/jtagspi.cfg]